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56 Commits

Author SHA1 Message Date
Alex Forencich
bb158d568f Add RX indirection table 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-10 15:05:32 -07:00
Alex Forencich
30379cd8a3 Add phase tag to events and completions to avoid queue pointer reads 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-06 20:43:13 -07:00
Alex Forencich
d3942da875 fpga: Add clock info register block 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-10-15 19:45:02 -07:00
Alex Forencich
03a49d7bc6 Add 25G mqnic design for DE10-Agilex 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-07-19 23:43:22 -07:00
Alex Forencich
debf36a01e modules/mqnic: Add driver support for 250-SoC 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-07-18 22:26:39 -07:00
Alex Forencich
21b0f014a5 Switch to MSI-X 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-06-02 23:58:29 -07:00
Alex Forencich
9653caf09b Add 25G mqnic design for Cisco Nexus K3P-Q 2022-05-09 14:02:13 -07:00
Alex Forencich
ba9ef590b7 Use Cisco Nexus part numbers for Cisco Nexus boards 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-05-09 13:43:47 -07:00
Alex Forencich
c2fea3a616 Add port register blocks with support for PHY link status reporting 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-05-04 09:03:37 -07:00
Alex Forencich
cc9d445005 Move driver-specific code out of mqnic_hw.h 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-24 22:54:04 -07:00
Alex Forencich
2bd8350276 Add RX queue mapping module 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-23 00:12:22 -07:00
Alex Forencich
7f8bbe30de Add application ID 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-21 13:15:45 -07:00
Alex Forencich
a6affe4190 modules/mqnic: Add driver support for XUP-P3R board 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-16 15:21:11 -07:00
Alex Forencich
58bcea2114 modules/mqnic: Add driver support for DNPCIe_40G_KU_LL_2QSFP board 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-16 15:20:44 -07:00
Alex Forencich
eb530475fb More expressive flash format register 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-15 18:38:01 -07:00
Joachim Foerster
26c70bbb8a modules/mqnic/: Add platform driver support 
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
 2022-04-07 17:14:25 +02:00
Alex Forencich
cbd9d0dfc6 Expose port and scheduler block counts in IF control block; update driver model, driver, and userspace tools to handle scheduler blocks separately from ports 2022-03-28 17:23:27 -07:00
Alex Forencich
137a6778da Combine interface control blocks 2022-01-15 21:53:13 -08:00
Alex Forencich
335a5e890b Initial implementation of shared interface datapath 2021-12-31 14:33:31 -08:00
Alex Forencich
ce21774f06 Register space reorganization 2021-12-29 22:31:46 -08:00
Alex Forencich
ddeb8bad94 Use atomic notifier chain for interrupt handling 2021-12-10 21:05:31 -08:00
Alex Forencich
4ade485344 bits.h is not available in userspace 2021-10-21 15:38:25 -07:00
Alex Forencich
27c9241a69 Update header comment, add SPDX license identifiers 2021-10-21 14:55:48 -07:00
Alex Forencich
5b49f09baa Fix kernel module coding style 2021-10-08 18:31:53 -07:00
Alex Forencich
4294e5ea1d Use BIT macros 2021-10-08 16:55:56 -07:00
Alex Forencich
875b664c13 Update offset 2021-09-13 12:54:35 -07:00
Alex Forencich
220511f661 Use little endian types in hardware structs 2021-01-13 20:19:45 -08:00
Alex Forencich
dd3374626f Add flash control registers to mqnic_hw.h 2020-10-04 00:43:36 -07:00
Alex Forencich
6178d52056 Add driver support for fb2CG@KU15P 2020-09-22 23:12:28 -07:00
Alex Forencich
a46cb33b69 Add mqnic_create_i2c_adapter method 2020-09-19 17:25:58 -07:00
Alex Forencich
a37d9b3465 New transceiver control reigster definitions 2020-09-19 17:25:58 -07:00
Alex Forencich
3284ec3848 New I2C register definitions 2020-09-19 17:25:58 -07:00
Alex Forencich
9b019aba29 Add board ID for ZCU106 2020-08-06 23:33:54 -07:00
Alex Forencich
2d4c7925f0 Add Alveo board IDs 2020-07-11 23:07:50 -07:00
Alex Forencich
8b535e54ac Add MTU registers 2020-05-01 18:55:01 -07:00
Alex Forencich
1f76606667 Move TDMA registers 2020-05-01 16:55:57 -07:00
Alex Forencich
a4108ecbf9 Implement TX scatter/gather in driver 2020-04-21 17:18:58 -07:00
Alex Forencich
bffb9b7b19 Add board ID for NetFPGA SUME 2020-03-28 00:48:22 -07:00
Alex Forencich
73bb9a68c1 Add VCU1525 HW ID 2020-01-16 17:43:20 -08:00
Alex Forencich
8aeea9e110 Add perout offset and stride defines 2019-12-30 20:45:56 -08:00
Alex Forencich
91a538ff5f Change driver queue count limits 2019-12-29 23:40:07 -08:00
Alex Forencich
6270278c75 Add RSS support 2019-12-06 14:15:16 -08:00
Alex Forencich
463f2053b0 Add port register port_mtu 2019-11-18 16:30:32 -08:00
Alex Forencich
489506e4c0 Add FPGA ID register 2019-11-17 12:46:27 -08:00
Alex Forencich
f53a6b20e8 Add timeslot count to port registers 2019-11-05 16:59:40 -08:00
Alex Forencich
fa5e013255 Add MQNIC_MAX_SCHED define 2019-11-05 16:45:58 -08:00
Alex Forencich
e92485a41e Fix register definitions 2019-11-05 16:44:57 -08:00
Alex Forencich
f43cd09dac Add ExaNIC X25 mqnic design 2019-10-30 17:43:33 -07:00
Alex Forencich
d977cbdac2 Add feature bits 2019-08-19 23:43:52 -07:00
Alex Forencich
5f066b9fcd Adjust ExaNIC board ID to match original PCIe ID 2019-08-19 22:04:10 -07:00