FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-01-30 08:32:52 +08:00
Code Issues Projects Releases Wiki Activity
410 Commits 1 Branch 0 Tags
Commit Graph

7 Commits

Author SHA1 Message Date
Alex Forencich
bd27156f35 AXI stream updates 2018-02-26 00:08:08 -08:00
Alex Forencich
0fc986041e Fix example design LED logic 2017-05-19 17:44:29 -07:00
Alex Forencich
9b2ac9dfc1 Happy new year 2017-05-18 13:47:45 -07:00
Alex Forencich
c2e459c971 Connect transceiver control lines 2017-03-09 17:14:14 -08:00
Alex Forencich
270641b7a3 Update UDP modules and example designs to utilize UDP checksum modules 2016-09-30 22:15:21 -07:00
Alex Forencich
5eb0d9f578 Move invert to top-level module 2016-01-25 13:21:35 -08:00
Alex Forencich
eb8dd775a1 Add 10G reference design for DE5-Net 2016-01-25 00:53:06 -08:00