245 Commits

Author	SHA1	Message	Date
Alex Forencich	a91e2b7e17	Add KC705 SGMII example design	2020-12-30 17:15:34 -08:00
Alex Forencich	5a7fd98413	Add KC705 RGMII example design	2020-12-30 17:15:18 -08:00
Alex Forencich	8a021f5c9b	Update KC705 XDC	2020-12-30 16:54:30 -08:00
Alex Forencich	22feb53e1d	Update example design readmes	2020-12-30 16:48:37 -08:00
Alex Forencich	77d22bfde0	Rework sim_build output directory, fix default makefile target	2020-12-29 14:47:12 -08:00
Alex Forencich	0359d8d76a	Use absolute path to test directory	2020-12-28 19:25:59 -08:00
Alex Forencich	079d6329cb	Migrate example design testbenches to cocotb	2020-12-28 01:11:03 -08:00
Alex Forencich	a78627343d	Change default target parameter	2020-12-25 01:48:24 -08:00
Alex Forencich	220e04d1a7	Update example design	2020-12-25 01:47:01 -08:00
Alex Forencich	2a2d8ac966	Fix reg type in VCU108 and VCU118 example designs	2020-12-20 14:22:52 -08:00
Alex Forencich	306aa4db0b	Update VCU118 XDC	2020-10-06 00:39:32 -07:00
Alex Forencich	ed7136a095	Update flash programming configuration for ExaNIC X10 and X25	2020-10-03 15:27:30 -07:00
Alex Forencich	9261f26f64	Update VCU108 XDC	2020-10-02 20:50:00 -07:00
Alex Forencich	9e4bd6e854	Fix flash programming commands for VCU108	2020-10-01 00:53:13 -07:00
Alex Forencich	816e071a57	Fix bitstream config for VCU1525	2020-09-30 23:50:31 -07:00
Alex Forencich	bf9f1a6211	Update flash programming commands	2020-09-29 18:29:27 -07:00
Alex Forencich	3f52ed675c	Fix flash settings	2020-09-29 17:30:13 -07:00
Alex Forencich	2bc052e0d5	Update LED driver timing constraints	2020-09-28 17:24:11 -07:00
Alex Forencich	d0a45d8213	Add fb2CG flash programming commands	2020-09-27 01:45:56 -07:00
Alex Forencich	82cf0d5a6f	Use correct init_clk frequency	2020-09-23 14:24:18 -07:00
Alex Forencich	6a4bcaab38	Add timing constraints for LED driver	2020-09-22 22:13:59 -07:00
Alex Forencich	a7972e32bb	Add fb2CG 10G example design	2020-09-20 01:18:47 -07:00
Alex Forencich	4db7f50ad8	Update readme	2020-09-18 01:26:09 -07:00
Alex Forencich	c9a023c1e0	Add AU250 10G example design	2020-09-18 01:20:42 -07:00
Alex Forencich	6254158e1b	Add AU200 10G example design	2020-09-18 01:20:20 -07:00
Alex Forencich	9a8ba2f0f2	Add ZCU102 example design	2020-09-18 00:15:21 -07:00
Alex Forencich	d97e95b6c7	Update XDC	2020-08-06 22:06:40 -07:00
Alex Forencich	df5368d153	Add ZCU106 example design	2020-08-06 18:26:07 -07:00
Alex Forencich	6aba3a741a	Update makefiles	2020-08-06 17:19:11 -07:00
Alex Forencich	fd908dd2aa	Clean up clock connections	2020-08-06 17:15:38 -07:00
Alex Forencich	f0e130aa48	Add AU50 10G example design	2020-07-17 00:06:32 -07:00
Alex Forencich	2570c75a0c	Clean up AU280 design	2020-07-16 23:55:12 -07:00
Alex Forencich	f2f3c0f977	Add AU280 10G example design	2020-07-15 00:06:38 -07:00
Alex Forencich	b7c089dd22	XDC clean up	2020-07-13 23:58:30 -07:00
Alex Forencich	3898cf21ed	Add DE2-115 example design	2020-07-10 15:38:43 -07:00
Alex Forencich	3b06f86dcf	Add C10LP example design	2020-07-10 15:32:39 -07:00
Alex Forencich	a27c04a949	Convert to TCL IP	2020-07-01 19:43:26 -07:00
Alex Forencich	73bd619d85	Add NetFPGA SUME example design	2020-03-27 19:01:50 -07:00
Alex Forencich	27ed447005	Use common sync_reset module files	2020-03-27 18:27:45 -07:00
Alex Forencich	a55c354924	Parametrize Ethernet frame parsing	2020-02-21 21:37:57 -08:00
Alex Forencich	4ac6d6803b	Parametrize ARP components	2020-02-20 16:49:47 -08:00
Alex Forencich	815705f413	Add VCU1525 10G example design	2020-01-15 23:14:08 -08:00
Alex Forencich	b34f294900	Add ExaNIC X25 10G example design	2019-10-30 17:14:27 -07:00
Alex Forencich	b3c654461e	Update example design	2019-10-22 23:17:39 -07:00
Alex Forencich	c5e886769a	Fix typo	2019-07-19 10:29:55 -07:00
Alex Forencich	16e5ec2106	Update example designs	2019-07-18 17:13:47 -07:00
Alex Forencich	e5171d8749	Enable flash programming in VCU118 example designs	2019-07-01 17:51:31 -07:00
Alex Forencich	386ff91210	Add ExaNIC X10 flash programming commands	2019-06-27 01:27:32 -07:00
Alex Forencich	d62a5ad050	Fix quotes	2019-06-27 01:26:58 -07:00
Alex Forencich	dfafa9c83d	Update vivado.mk	2019-06-27 00:59:36 -07:00