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Commit Graph

25 Commits

Author SHA1 Message Date
Alex Forencich
3253164fec Add IPROG for ExaNIC X25 2020-10-03 15:37:37 -07:00
Alex Forencich
be67f173b6 Update flash programming configuration for ExaNIC X10 and X25 2020-10-03 15:32:21 -07:00
Alex Forencich
70b7082fb6 Implement new control registers 2020-09-19 17:25:58 -07:00
Alex Forencich
c8f5bb235c Remove extraneous clock connections 2020-08-19 18:33:41 -07:00
Alex Forencich
e54eb685b3 Update makefiles 2020-08-06 18:43:47 -07:00
Alex Forencich
77b9cace47 Update BAR configuration in testbenches 2020-07-28 19:01:53 -07:00
Alex Forencich
ffd04d2bb0 Cleanup 2020-07-28 19:00:33 -07:00
Alex Forencich
d449be8fc5 Convert to 64 bit BARs 2020-07-24 16:54:57 -07:00
Alex Forencich
f99736d4f5 Convert to TCL IP 2020-07-11 20:07:13 -07:00
Alex Forencich
50af74aa88 Change QUEUE_LOG_SIZE_WIDTH to LOG_QUEUE_SIZE_WIDTH 2020-04-20 18:43:26 -07:00
Alex Forencich
9e3e80661c Use common sync_reset module 2020-03-27 23:53:05 -07:00
Alex Forencich
a501f33c09 Update parameters 2019-12-29 16:46:25 -08:00
Alex Forencich
0955a4101f Fix signal widths 2019-12-29 16:45:32 -08:00
Alex Forencich
7a68abbb84 Split control and data descriptor paths to DMA engine 2019-12-13 14:15:25 -08:00
Alex Forencich
88e31d0ccb Connect PCIe credit interface to DMA cores 2019-12-13 12:41:50 -08:00
Alex Forencich
6270278c75 Add RSS support 2019-12-06 14:15:16 -08:00
Alex Forencich
0e7a91d927 Connect RQ sequence number 2019-12-03 18:19:17 -08:00
Alex Forencich
489506e4c0 Add FPGA ID register 2019-11-17 12:46:27 -08:00
Alex Forencich
33be402b16 Update widths 2019-11-14 00:02:10 -08:00
Alex Forencich
f36773660d Set flash ID 2019-11-06 15:05:32 -08:00
Alex Forencich
93de8a1b32 Remove extraneous init code 2019-11-05 18:32:36 -08:00
Alex Forencich
e43c011e33 Update testbenches 2019-11-05 18:31:41 -08:00
Alex Forencich
cc592b44d7 Use correct PCIe core model 2019-11-04 14:13:12 -08:00
Alex Forencich
736321641f Parametrize addressing 2019-10-31 23:24:42 -07:00
Alex Forencich
f43cd09dac Add ExaNIC X25 mqnic design 2019-10-30 17:43:33 -07:00