Alex Forencich
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c2fea3a616
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Add port register blocks with support for PHY link status reporting
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-04 09:03:37 -07:00 |
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Alex Forencich
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56641b3471
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modules/mqnic: Export symbols
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-25 00:47:37 -07:00 |
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Alex Forencich
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e4de3c2fb5
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modules/mqnic: Consistent naming of driver functions and structs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-24 23:01:15 -07:00 |
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Alex Forencich
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1b3caa1f0f
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Fix reg block enumeration to properly handle NULL register blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-22 23:27:15 -07:00 |
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Alex Forencich
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cbd9d0dfc6
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Expose port and scheduler block counts in IF control block; update driver model, driver, and userspace tools to handle scheduler blocks separately from ports
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2022-03-28 17:23:27 -07:00 |
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