Alex Forencich
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d78700d3bf
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fpga: Remove redundant RX PTP clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-10-27 22:40:40 -07:00 |
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Alex Forencich
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6f2da7c1e9
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fpga/common: Use async clocking for CMAC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-10-27 22:40:08 -07:00 |
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Alex Forencich
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9963674c61
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Add flow control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-09 19:01:36 -07:00 |
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Alex Forencich
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448fa8eb4c
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Use SPDX
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-06-26 11:44:57 -07:00 |
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Alex Forencich
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ca07a23afc
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fpga/common: Add extra non-ASYNC_REG registers on transceiver resets to permit replication
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-24 21:34:42 -08:00 |
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Alex Forencich
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bf7cf3fef9
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Add CMAC wrapper
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-11-09 20:58:30 -08:00 |
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