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6 Commits

Author SHA1 Message Date
Alex Forencich
d78700d3bf fpga: Remove redundant RX PTP clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-10-27 22:40:40 -07:00
Alex Forencich
6f2da7c1e9 fpga/common: Use async clocking for CMAC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-10-27 22:40:08 -07:00
Alex Forencich
9963674c61 Add flow control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-09-09 19:01:36 -07:00
Alex Forencich
448fa8eb4c Use SPDX
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-06-26 11:44:57 -07:00
Alex Forencich
ca07a23afc fpga/common: Add extra non-ASYNC_REG registers on transceiver resets to permit replication
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-02-24 21:34:42 -08:00
Alex Forencich
bf7cf3fef9 Add CMAC wrapper
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-11-09 20:58:30 -08:00