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3 Commits

Author SHA1 Message Date
Alex Forencich
f8a24d1c46 Add attributes to RAMs for proper synthesis in Quartus 2021-11-06 16:14:22 -07:00
Alex Forencich
7ac4797336 Add default_nettype none and resetall directives 2021-10-20 21:53:39 -07:00
Alex Forencich
9ccd43d470 Add statistics collection modules 2021-09-05 18:28:37 -07:00