Alex Forencich
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23aef37aff
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Rewrite resets
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2020-03-08 16:56:06 -07:00 |
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Alex Forencich
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248a0b4f93
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Convert descriptor to DMA operation without storing in table
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2020-03-08 00:22:55 -08:00 |
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Alex Forencich
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f642bb7f7e
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Reserve packet data slot early and release on dequeue fail
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2019-12-30 17:49:42 -08:00 |
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Alex Forencich
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8fa7e40507
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Use new DMA subsystem
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2019-10-17 16:02:14 -07:00 |
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Alex Forencich
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2325966973
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Pull out descriptor and completion handling logic
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2019-09-23 18:10:35 -07:00 |
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Alex Forencich
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e0a1e49d7b
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Update tx_engine to return status early in case of dequeue fail
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2019-09-02 08:17:09 -07:00 |
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Alex Forencich
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bcfd665823
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Connect queue index field in queue operation response
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2019-09-01 08:29:22 -07:00 |
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Alex Forencich
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364d835957
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Split queue op tag table entry
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2019-08-29 19:44:43 -07:00 |
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Alex Forencich
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a4132cfda7
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Integrate TX checksum offload
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2019-08-22 00:45:09 -07:00 |
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Alex Forencich
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26f6774182
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Parameter updates and documentation
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2019-07-27 23:47:46 -07:00 |
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Alex Forencich
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f94e83e520
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Add transmit and receive engines
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2019-07-17 16:38:57 -07:00 |
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