FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00
Code Issues Projects Releases Wiki Activity
676 Commits 1 Branch 0 Tags
Commit Graph

8 Commits

Author SHA1 Message Date
Alex Forencich
df04d7e68d CRC handling logic optimizations 2019-06-20 18:10:53 -07:00
Alex Forencich
9e7f4a9836 Remove unused state bit 2019-06-20 18:02:15 -07:00
Alex Forencich
2794c315e8 Fix synthesizer complaints 2019-06-08 17:36:09 -07:00
Alex Forencich
82fe5a6bdd Add PTP timestamp capture logic to MACs 2019-06-07 16:38:36 -07:00
Alex Forencich
659aa67481 Pack start packet strobes into the same signal 2019-06-06 17:13:14 -07:00
Alex Forencich
696c634726 Add rx_bad_block outputs 2019-04-17 00:16:45 -07:00
Alex Forencich
b691a30760 Accept OS_START block type 2019-03-26 12:06:58 -07:00
Alex Forencich
ec38440d89 Add 10G Ethernet MAC/PHY combination modules and testbenches 2019-01-31 18:13:07 -08:00