24 Commits

Author	SHA1	Message	Date
Alex Forencich	021c91fcc7	Unconditionally wait at least one delta cycle	2019-07-16 00:37:20 -07:00
Alex Forencich	5b2d4fd465	Add force offset start parameter	2019-01-22 18:46:34 -08:00
Alex Forencich	92df3778ea	Fix DIC implementation in testbench	2019-01-22 14:23:29 -08:00
Alex Forencich	5fbd67501c	Clamp ifg_cnt at zero	2019-01-16 17:25:08 -08:00
Alex Forencich	bf94ef56b8	Move ifg parameter	2019-01-16 13:23:02 -08:00
Alex Forencich	fe8a4f9df3	Use constants for control characters	2018-11-11 00:18:32 -08:00
Alex Forencich	6a4b2699ea	End frame reception on any control character	2018-11-11 00:11:27 -08:00
Alex Forencich	25e196e18b	Insert idle characters	2018-11-10 18:56:50 -08:00
Alex Forencich	b195c6450b	Add IFG parameter	2018-11-10 18:23:44 -08:00
Alex Forencich	a49b78b3c3	Add width asserts	2018-11-10 18:23:31 -08:00
Alex Forencich	b6c8cc7125	Append termination control character	2018-11-10 18:16:30 -08:00
Alex Forencich	0159376cda	Simplify IFG count handling	2018-11-10 17:35:31 -08:00
Alex Forencich	d59a0553bd	Change start character handling	2018-11-09 16:51:54 -08:00
Alex Forencich	261ad46a8a	Add enable signals to xgmii model	2018-11-09 16:47:19 -08:00
Alex Forencich	65c64588a6	More endpoint updates	2018-07-02 16:33:13 -07:00
Alex Forencich	63f9bbeced	Update endpoints	2018-07-02 13:20:49 -07:00
Alex Forencich	e4672915e6	Update testbenches to use instances()	2018-06-13 22:43:11 -07:00
Alex Forencich	0fd157964a	Happy new year	2018-02-26 12:50:51 -08:00
Alex Forencich	9b2ac9dfc1	Happy new year	2017-05-18 13:47:45 -07:00
Alex Forencich	88150c9d5f	Update and rework endpoints, update testbenches	2016-09-13 15:24:02 -07:00
Alex Forencich	c34a9c2197	Add 32 bit XGMII support	2016-07-19 19:59:47 -07:00
Alex Forencich	7d7cba0838	Add bus width checks	2016-07-19 16:21:15 -07:00
Alex Forencich	9c01e114b4	Happy new year	2016-01-05 00:34:32 -08:00
Alex Forencich	17edcfe88e	Add XGMII endpoint module	2015-05-08 00:04:12 -07:00