62 Commits

Author	SHA1	Message	Date
Alex Forencich	4aa672f8f3	Update example designs	2021-10-17 20:20:26 -07:00
Alex Forencich	97182ccf4e	Update vivado.mk	2021-06-23 20:07:29 -07:00
Alex Forencich	5415c41c41	Remove string parameters	2021-06-02 17:50:26 -07:00
Alex Forencich	7751aba8da	Reorganize timing constraints	2021-05-18 16:15:41 -07:00
Alex Forencich	c021d01c26	Update example design readmes	2021-05-04 15:48:12 -07:00
Alex Forencich	c0c2dbce2a	Update XDC files	2021-02-06 15:15:34 -08:00
Alex Forencich	77d22bfde0	Rework sim_build output directory, fix default makefile target	2020-12-29 14:47:12 -08:00
Alex Forencich	0359d8d76a	Use absolute path to test directory	2020-12-28 19:25:59 -08:00
Alex Forencich	079d6329cb	Migrate example design testbenches to cocotb	2020-12-28 01:11:03 -08:00
Alex Forencich	2a2d8ac966	Fix reg type in VCU108 and VCU118 example designs	2020-12-20 14:22:52 -08:00
Alex Forencich	9261f26f64	Update VCU108 XDC	2020-10-02 20:50:00 -07:00
Alex Forencich	9e4bd6e854	Fix flash programming commands for VCU108	2020-10-01 00:53:13 -07:00
Alex Forencich	6aba3a741a	Update makefiles	2020-08-06 17:19:11 -07:00
Alex Forencich	fd908dd2aa	Clean up clock connections	2020-08-06 17:15:38 -07:00
Alex Forencich	b7c089dd22	XDC clean up	2020-07-13 23:58:30 -07:00
Alex Forencich	a27c04a949	Convert to TCL IP	2020-07-01 19:43:26 -07:00
Alex Forencich	27ed447005	Use common sync_reset module files	2020-03-27 18:27:45 -07:00
Alex Forencich	a55c354924	Parametrize Ethernet frame parsing	2020-02-21 21:37:57 -08:00
Alex Forencich	4ac6d6803b	Parametrize ARP components	2020-02-20 16:49:47 -08:00
Alex Forencich	c5e886769a	Fix typo	2019-07-19 10:29:55 -07:00
Alex Forencich	16e5ec2106	Update example designs	2019-07-18 17:13:47 -07:00
Alex Forencich	d62a5ad050	Fix quotes	2019-06-27 01:26:58 -07:00
Alex Forencich	dfafa9c83d	Update vivado.mk	2019-06-27 00:59:36 -07:00
Alex Forencich	025f05e667	Add nojournal and nolog	2019-06-27 00:48:20 -07:00
Alex Forencich	af4f675840	Fix for dash	2019-06-27 00:15:36 -07:00
Alex Forencich	88cc4e6e24	Update VCU108 flash programming commands	2019-06-26 19:50:28 -07:00
Alex Forencich	daf1d3106f	Enable flash programming on VCU108	2019-06-26 01:28:54 -07:00
Alex Forencich	7cce7896b5	Update programming commands	2019-06-25 23:46:44 -07:00
Alex Forencich	27999924a0	Update VCU108 example designs	2019-06-15 17:35:49 -07:00
Alex Forencich	5428d81fd6	Update AXI stream switch instances	2019-03-28 23:56:06 -07:00
Alex Forencich	0ca8c9a59b	Update example design timing constraints	2019-03-28 17:59:30 -07:00
Alex Forencich	e120a85607	Use correct clock	2019-03-28 17:56:55 -07:00
Alex Forencich	d16d291d5e	Upgrade example design IP cores	2019-03-28 16:30:34 -07:00
Alex Forencich	cd6b87e984	Enable bitstream compression in example designs	2019-02-06 21:25:30 -08:00
Alex Forencich	e882ed143f	Update example designs	2018-11-08 09:20:33 -08:00
Alex Forencich	0a6bee6d69	Update example designs	2018-11-08 09:17:29 -08:00
Alex Forencich	7d6889add6	Update example designs	2018-10-30 21:32:32 -07:00
Alex Forencich	00dc50826d	Update example designs	2018-10-24 01:03:44 -07:00
Alex Forencich	8982b4f4e1	Fix modsell pin	2018-06-29 13:00:41 -07:00
Alex Forencich	cd51821bf7	Add parameters	2018-06-22 18:56:05 -07:00
Alex Forencich	e4672915e6	Update testbenches to use instances()	2018-06-13 22:43:11 -07:00
Alex Forencich	298ae4defa	Update MAC module instantiation	2018-06-13 22:16:02 -07:00
Alex Forencich	415f723edc	Fix clock name	2018-06-11 16:37:34 -07:00
Alex Forencich	855b593ce5	Minor updates to 10G example designs	2018-05-31 16:05:41 -07:00
Alex Forencich	0fd157964a	Happy new year	2018-02-26 12:50:51 -08:00
Alex Forencich	bd27156f35	AXI stream updates	2018-02-26 00:08:08 -08:00
Alex Forencich	69253d2d83	Update VCU108 example design	2017-06-01 06:48:50 -07:00
Alex Forencich	0fc986041e	Fix example design LED logic	2017-05-19 17:44:29 -07:00
Alex Forencich	2e3b15239b	Update Vivado IP	2017-05-18 13:49:10 -07:00
Alex Forencich	9b2ac9dfc1	Happy new year	2017-05-18 13:47:45 -07:00