FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-02-06 08:38:23 +08:00
Code Issues Projects Releases Wiki Activity
1,234 Commits 1 Branch 0 Tags
Commit Graph

1234 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Alex Forencich
76c805e416 Fix more indexing bugs 2019-07-24 15:38:49 -07:00
Alex Forencich
8179a32b7d Pass all parameters in testbenches 2019-07-24 15:26:49 -07:00
Alex Forencich
1085d651a0 merged changes in axis 2019-07-24 15:23:00 -07:00
Alex Forencich
23b9490fac Fix switch bug 2019-07-24 15:22:35 -07:00
Alex Forencich
099bb0e8b5 merged changes in axis 2019-07-24 14:26:48 -07:00
Alex Forencich
8f36c4a216 Update priority encoder 2019-07-24 14:23:04 -07:00
Alex Forencich
d694a67190 Update priority encoder 2019-07-24 14:22:47 -07:00
Alex Forencich
5f454d6c05 Update axis_switch to support default routing configurations 2019-07-24 14:20:07 -07:00
Alex Forencich
c5f44c70d1 Add parameter documentation 2019-07-24 13:54:21 -07:00
Alex Forencich
c091f7ed76 Add switch wrapper generator 2019-07-24 13:46:33 -07:00
Alex Forencich
b4cebd8394 Fix crosspoint wrapper generator 2019-07-24 13:44:43 -07:00
Alex Forencich
c759ff03b7 Fix default parameter 2019-07-24 11:07:17 -07:00
Alex Forencich
0a16bb1299 Fix parametrization 2019-07-24 01:45:18 -07:00
Alex Forencich
5c736fc094 More hardware IDs 2019-07-23 22:30:26 -07:00
Alex Forencich
987e11f6c0 Query regs size via info ioctl 2019-07-23 18:43:58 -07:00
Alex Forencich
5ea84cb7b5 Add info ioctl 2019-07-23 18:43:04 -07:00
Alex Forencich
a862711a0a Update perout to use timespec handling code 2019-07-22 18:06:17 -07:00
Alex Forencich
c44ffe2f92 Add timespec handling code 2019-07-22 18:00:55 -07:00
Alex Forencich
32cadd4480 Update mqnic-fw to use new code 2019-07-21 21:56:23 -07:00
Alex Forencich
1b45043965 Update makefile 2019-07-21 21:54:22 -07:00
Alex Forencich
1b147ff7c8 Add shared utility code 2019-07-21 21:53:37 -07:00
Alex Forencich
762037e8a8 Updates to be able to share header with userspace code 2019-07-21 21:51:14 -07:00
Alex Forencich
a6c4b8b1b7 Change board IDs 2019-07-21 15:27:01 -07:00
Alex Forencich
851eb2f25e Update readme 2019-07-20 00:56:21 -07:00
Alex Forencich
ea7ccd182e Move MAC out of port module 2019-07-19 23:29:03 -07:00
Alex Forencich
1917ed3912 merged changes in eth 2019-07-19 18:17:57 -07:00
Alex Forencich
ab77ac3858 Fix width 2019-07-19 18:16:07 -07:00
Alex Forencich
451db171d1 Don't leave output floating 2019-07-19 18:13:30 -07:00
Alex Forencich
9de2101cdc Update ExaNIC X10 testbenches 2019-07-19 18:01:24 -07:00
Alex Forencich
eb92578699 Update FIFO instances 2019-07-19 16:17:36 -07:00
Alex Forencich
00ebe73bdc merged changes in eth 2019-07-19 15:52:41 -07:00
Alex Forencich
36b3dccb6a Add mqnic-fw utility 2019-07-19 15:48:33 -07:00
Alex Forencich
578abab3de Add mqnic-config utility 2019-07-19 15:46:56 -07:00
Alex Forencich
5b15f03f69 Add ADM-PCIE-9V3 mqnic_tdma design 2019-07-19 15:43:40 -07:00
Alex Forencich
a9179dc550 Add ExaNIC X10 mqnic_tdma design 2019-07-19 15:42:18 -07:00
Alex Forencich
4b37a4484d Add TDMA round-robin scheduler 2019-07-19 15:40:53 -07:00
Alex Forencich
750112ff06 Add ADM-PCIE-9V3 mqnic design 2019-07-19 15:39:40 -07:00
Alex Forencich
4c3f2412df Add TDMA BERT modules and testbenches 2019-07-19 15:28:57 -07:00
Alex Forencich
c5e886769a Fix typo 2019-07-19 10:29:55 -07:00
Alex Forencich
16d1662d98 Add PTP timestamping infrastructure to 10G MACs 2019-07-18 23:13:46 -07:00
Alex Forencich
4e49dbcf3d Pass parameters to model 2019-07-18 22:51:54 -07:00
Alex Forencich
8cb0a5e06e Add parameters for PTP clock model 2019-07-18 22:49:29 -07:00
Alex Forencich
16755720d3 Add PTP tag inserter module 2019-07-18 22:39:50 -07:00
Alex Forencich
b26f923c2f Reset synchronizers 2019-07-18 18:35:30 -07:00
Alex Forencich
adb9c4d147 Fix initial values 2019-07-18 18:35:11 -07:00
Alex Forencich
16e5ec2106 Update example designs 2019-07-18 17:13:47 -07:00
Alex Forencich
3bd7be44fa Update FIFO instances and update MACs to use combined FIFO adapter module 2019-07-18 16:25:49 -07:00
Alex Forencich
3a79b8fb17 merged changes in axis 2019-07-18 11:50:56 -07:00
Alex Forencich
8b2f37d5cc Update readme 2019-07-18 11:28:19 -07:00
Alex Forencich
69de6fd2a4 Convert FIFOs to use DEPTH parameter instead of ADDR_WIDTH 2019-07-18 11:27:25 -07:00