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16 Commits

Author SHA1 Message Date
Alex Forencich
3587cf5285 Fix AXI memory model bug 2018-12-06 15:14:54 -08:00
Alex Forencich
160f20bc8c Change default awcache/arcache value 2018-08-17 16:29:12 -07:00
Alex Forencich
4adcf9c7d0 Add prot and resp signal encoding constants 2018-08-15 23:02:57 -07:00
Alex Forencich
5614f7dafe When pausing the AXI model, do not drop valid signals if they are asserted and waiting for a ready signal assert 2018-08-14 23:38:08 -07:00
Alex Forencich
09759518fc ID always zero if ID pins not connected 2018-08-14 21:48:24 -07:00
Alex Forencich
649179894a Remove unnecessary asserts 2018-08-14 21:46:05 -07:00
Alex Forencich
a962dfce72 Properly handle read bursts in AXI model 2018-08-13 15:12:56 -07:00
Alex Forencich
7e18825ba2 Fix 4k align 2018-08-12 23:08:38 -07:00
Alex Forencich
aed7cf9d9b Print burst debugging information 2018-08-12 22:37:28 -07:00
Alex Forencich
ed27cebed8 Add max_burst_len parameter 2018-08-11 23:09:28 -07:00
Alex Forencich
e29114fe04 Check for disconnected ports 2018-08-11 23:09:00 -07:00
Alex Forencich
4ee04f6682 Support pausing channels in AXI models 2018-08-11 21:47:08 -07:00
Alex Forencich
048c0bb5e5 Updates for python 2 2018-08-06 15:02:59 -07:00
Alex Forencich
947e700dc2 Support omitting id signals 2018-08-02 17:27:40 -07:00
Alex Forencich
e78f865ddf Fix 4K boundary assert 2018-07-30 17:54:23 -07:00
Alex Forencich
f4cca52660 Initial commit 2018-07-29 19:04:30 -07:00