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corundum/example
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Alex Forencich 0db9fdd2b9 Test S10 example design with 2 segments by default 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-06-22 16:47:00 -07:00
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520N_MX/fpga
Remove recursively-expanded macros for module parameters in makefiles
2023-02-17 15:58:34 -08:00
ADM_PCIE_9V3
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
AU50
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
AU200
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
AU250
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
AU280
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
common
Test S10 example design with 2 segments by default
2023-06-22 16:47:00 -07:00
DE10_Agilex/fpga
Remove recursively-expanded macros for module parameters in makefiles
2023-02-17 15:58:34 -08:00
ExaNIC_X10
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
ExaNIC_X25
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
fb2CG
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
S10DX_DK/fpga
Remove recursively-expanded macros for module parameters in makefiles
2023-02-17 15:58:34 -08:00
S10MX_DK/fpga
Remove recursively-expanded macros for module parameters in makefiles
2023-02-17 15:58:34 -08:00
VCU108
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
VCU118
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
VCU1525
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00
ZCU106
Update example designs based on results of buffer size tests
2023-06-16 16:55:42 -07:00