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corundum/example/HTG9200/fpga_10g/rtl
History
Alex Forencich 0f2478d68c Fix wires
2021-10-20 17:21:16 -07:00
..
debounce_switch.v
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
eth_xcvr_phy_wrapper.v
Rework GT instances in HTG9200 design
2021-10-20 00:57:11 -07:00
fpga_core.v
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
fpga.v
Fix wires
2021-10-20 17:21:16 -07:00
i2c_master.v
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
si5341_i2c_init.py
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
si5341_i2c_init.v
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
Si5341-RevD-fpga-161-osc-Registers.txt
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00
sync_signal.v
Add HTG-9200 10G example design
2021-07-08 11:58:04 -07:00