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244 lines
7.3 KiB
C
244 lines
7.3 KiB
C
/*
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Copyright 2019-2022, The Regents of the University of California.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS OF THE UNIVERSITY OF CALIFORNIA ''AS
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IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OF THE UNIVERSITY OF CALIFORNIA OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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The views and conclusions contained in the software and documentation are those
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of the authors and should not be interpreted as representing official policies,
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either expressed or implied, of The Regents of the University of California.
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*/
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#ifndef MQNIC_H
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#define MQNIC_H
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#include <limits.h>
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#include <stdint.h>
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#include "mqnic_hw.h"
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#include "reg_block.h"
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#define mqnic_reg_read32(base, reg) (((volatile uint32_t *)(base))[(reg)/4])
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#define mqnic_reg_write32(base, reg, val) (((volatile uint32_t *)(base))[(reg)/4]) = val
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struct mqnic;
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struct mqnic_res {
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unsigned int count;
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volatile uint8_t *base;
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unsigned int stride;
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};
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struct mqnic_sched {
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struct mqnic *mqnic;
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struct mqnic_if *interface;
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struct mqnic_sched_block *sched_block;
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int index;
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struct mqnic_reg_block *rb;
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uint32_t type;
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uint32_t offset;
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uint32_t channel_count;
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uint32_t channel_stride;
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size_t regs_size;
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volatile uint8_t *regs;
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};
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struct mqnic_sched_block {
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struct mqnic *mqnic;
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struct mqnic_if *interface;
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int index;
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struct mqnic_reg_block *rb_list;
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uint32_t sched_count;
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struct mqnic_sched *sched[MQNIC_MAX_SCHED];
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};
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struct mqnic_port {
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struct mqnic *mqnic;
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struct mqnic_if *interface;
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int index;
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struct mqnic_reg_block *rb_list;
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struct mqnic_reg_block *port_ctrl_rb;
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uint32_t port_features;
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};
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struct mqnic_if {
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struct mqnic *mqnic;
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int index;
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size_t regs_size;
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volatile uint8_t *regs;
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volatile uint8_t *csr_regs;
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struct mqnic_reg_block *rb_list;
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struct mqnic_reg_block *if_ctrl_rb;
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struct mqnic_reg_block *eq_rb;
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struct mqnic_reg_block *txq_rb;
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struct mqnic_reg_block *tx_cq_rb;
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struct mqnic_reg_block *rxq_rb;
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struct mqnic_reg_block *rx_cq_rb;
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struct mqnic_reg_block *rx_queue_map_rb;
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uint32_t if_features;
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uint32_t max_tx_mtu;
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uint32_t max_rx_mtu;
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uint32_t rx_queue_map_indir_table_size;
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volatile uint8_t *rx_queue_map_indir_table[MQNIC_MAX_PORTS];
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struct mqnic_res *eq_res;
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struct mqnic_res *txq_res;
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struct mqnic_res *tx_cq_res;
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struct mqnic_res *rxq_res;
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struct mqnic_res *rx_cq_res;
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uint32_t port_count;
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struct mqnic_port *ports[MQNIC_MAX_PORTS];
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uint32_t sched_block_count;
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struct mqnic_sched_block *sched_blocks[MQNIC_MAX_PORTS];
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};
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struct mqnic {
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int fd;
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int app_fd;
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int ram_fd;
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size_t regs_size;
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volatile uint8_t *regs;
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size_t app_regs_size;
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volatile uint8_t *app_regs;
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size_t ram_size;
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volatile uint8_t *ram;
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struct mqnic_reg_block *rb_list;
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struct mqnic_reg_block *fw_id_rb;
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struct mqnic_reg_block *if_rb;
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struct mqnic_reg_block *stats_rb;
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struct mqnic_reg_block *clk_info_rb;
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struct mqnic_reg_block *phc_rb;
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uint32_t fpga_id;
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const char *fpga_part;
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uint32_t fw_id;
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uint32_t fw_ver;
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uint32_t board_id;
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uint32_t board_ver;
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uint32_t build_date;
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uint32_t git_hash;
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uint32_t rel_info;
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uint32_t app_id;
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uint32_t stats_offset;
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uint32_t stats_count;
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uint32_t stats_stride;
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uint32_t stats_flags;
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uint16_t core_clk_nom_per_ns_num;
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uint16_t core_clk_nom_per_ns_denom;
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uint32_t core_clk_nom_freq_hz;
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uint16_t ref_clk_nom_per_ns_num;
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uint16_t ref_clk_nom_per_ns_denom;
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uint32_t ref_clk_nom_freq_hz;
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uint32_t clk_info_channels;
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uint32_t if_offset;
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uint32_t if_count;
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uint32_t if_stride;
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uint32_t if_csr_offset;
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char build_date_str[32];
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struct mqnic_if *interfaces[MQNIC_MAX_IF];
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char device_path[PATH_MAX];
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char pci_device_path[PATH_MAX];
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};
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// mqnic.c
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struct mqnic *mqnic_open(const char *dev_name);
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void mqnic_close(struct mqnic *dev);
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void mqnic_print_fw_id(struct mqnic *dev);
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// mqnic_res.c
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struct mqnic_res *mqnic_res_open(unsigned int count, volatile uint8_t *base, unsigned int stride);
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void mqnic_res_close(struct mqnic_res *res);
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unsigned int mqnic_res_get_count(struct mqnic_res *res);
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volatile uint8_t *mqnic_res_get_addr(struct mqnic_res *res, int index);
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// mqnic_if.c
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struct mqnic_if *mqnic_if_open(struct mqnic *dev, int index, volatile uint8_t *regs);
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void mqnic_if_close(struct mqnic_if *interface);
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uint32_t mqnic_interface_get_tx_mtu(struct mqnic_if *interface);
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uint32_t mqnic_interface_get_rx_mtu(struct mqnic_if *interface);
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uint32_t mqnic_interface_get_rx_queue_map_rss_mask(struct mqnic_if *interface, int port);
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uint32_t mqnic_interface_get_rx_queue_map_app_mask(struct mqnic_if *interface, int port);
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uint32_t mqnic_interface_get_rx_queue_map_indir_table(struct mqnic_if *interface, int port, int index);
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// mqnic_port.c
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struct mqnic_port *mqnic_port_open(struct mqnic_if *interface, int index, struct mqnic_reg_block *port_rb);
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void mqnic_port_close(struct mqnic_port *port);
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uint32_t mqnic_port_get_tx_status(struct mqnic_port *port);
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uint32_t mqnic_port_get_rx_status(struct mqnic_port *port);
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// mqnic_sched_block.c
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struct mqnic_sched_block *mqnic_sched_block_open(struct mqnic_if *interface, int index, struct mqnic_reg_block *block_rb);
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void mqnic_sched_block_close(struct mqnic_sched_block *block);
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// mqnic_scheduler.c
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struct mqnic_sched *mqnic_sched_open(struct mqnic_sched_block *block, int index, struct mqnic_reg_block *rb);
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void mqnic_sched_close(struct mqnic_sched *sched);
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// mqnic_clk_info.c
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void mqnic_clk_info_init(struct mqnic *dev);
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uint32_t mqnic_get_core_clk_nom_freq_hz(struct mqnic *dev);
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uint32_t mqnic_get_ref_clk_nom_freq_hz(struct mqnic *dev);
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uint32_t mqnic_get_core_clk_freq_hz(struct mqnic *dev);
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uint32_t mqnic_get_clk_freq_hz(struct mqnic *dev, int ch);
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uint64_t mqnic_core_clk_cycles_to_ns(struct mqnic *dev, uint64_t cycles);
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uint64_t mqnic_core_clk_ns_to_cycles(struct mqnic *dev, uint64_t ns);
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uint64_t mqnic_ref_clk_cycles_to_ns(struct mqnic *dev, uint64_t cycles);
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uint64_t mqnic_ref_clk_ns_to_cycles(struct mqnic *dev, uint64_t ns);
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// mqnic_stats.c
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void mqnic_stats_init(struct mqnic *dev);
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uint64_t mqnic_stats_read(struct mqnic *dev, int index);
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#endif /* MQNIC_H */
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