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corundum/example/VCU118/fpga_25g/rtl
History
Alex Forencich 16e5ec2106 Update example designs
2019-07-18 17:13:47 -07:00
..
debounce_switch.v
Add VCU118 25G example design
2019-06-19 23:25:06 -07:00
fpga_core.v
Update example designs
2019-07-18 17:13:47 -07:00
fpga.v
Add VCU118 25G example design
2019-06-19 23:25:06 -07:00
mdio_master.v
Add VCU118 25G example design
2019-06-19 23:25:06 -07:00
sync_reset.v
Add VCU118 25G example design
2019-06-19 23:25:06 -07:00
sync_signal.v
Add VCU118 25G example design
2019-06-19 23:25:06 -07:00