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corundum/fpga/mqnic/VCU108/fpga_10g
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Alex Forencich ef5b2449dc Add stretched PTP PPS output 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-07-18 22:25:58 -07:00
..
common
Update vivado.mk
2021-12-20 22:03:06 -08:00
fpga
Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
2022-07-08 22:07:18 -07:00
ip
Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
2022-07-08 22:07:18 -07:00
rtl
Add stretched PTP PPS output
2022-07-18 22:25:58 -07:00
tb/fpga_core
Change hex format in makefiles
2022-07-09 14:20:48 -07:00
app
Update VCU108 design
2021-09-12 23:17:50 -07:00
boot.xdc
Add BPI flash access and IPROG for VCU108
2020-10-02 20:44:47 -07:00
fpga.xdc
More XDC cleanup
2021-02-06 15:15:05 -08:00
lib
Add VCU108 mqnic design
2019-07-25 17:05:56 -07:00
Makefile
Add VCU108 mqnic design
2019-07-25 17:05:56 -07:00
README.md
Add VCU108 mqnic design
2019-07-25 17:05:56 -07:00

README.md

Corundum mqnic for VCU108

Introduction

This design targets the Xilinx VCU108 FPGA board.

FPGA: xcvu095-ffva2104-2-e PHY: 10G BASE-R PHY IP core and internal GTY transceiver

How to build

Run make to build. Ensure that the Xilinx Vivado toolchain components are in PATH.

Run make to build the driver. Ensure the headers for the running kernel are installed, otherwise the driver cannot be compiled.

How to test

Run make program to program the VCU108 board with Vivado. Then load the driver with insmod mqnic.ko. Check dmesg for output from driver initialization.