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corundum/fpga/mqnic/S10MX_DK/fpga_10g
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Alex Forencich 21b0f014a5 Switch to MSI-X 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-06-02 23:58:29 -07:00
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common
Register space reorganization
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fpga_1sm21b
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fpga_1sm21c
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ip
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rtl
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tb/fpga_core
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app
Add 10G mqnic design for Stratix 10 MX dev kit
2021-11-07 13:59:05 -08:00
fpga.qsf
Add 10G mqnic design for Stratix 10 MX dev kit
2021-11-07 13:59:05 -08:00
fpga.sdc
Update PTP subsystem to use separate clock for improved stability
2022-05-06 17:46:16 -07:00
lib
Add 10G mqnic design for Stratix 10 MX dev kit
2021-11-07 13:59:05 -08:00
README.md
Add 10G mqnic design for Stratix 10 MX dev kit
2021-11-07 13:59:05 -08:00

README.md

Corundum mqnic for Stratix 10 MX

Introduction

This design targets the Intel Stratix 10 MX FPGA development board.

  • FPGA: 1SM21BHU2F53E1VG (8 GB HBM2) or 1SM21CHU1F53E1VG (16 GB HBM2)
  • PHY: Transceiver in 10G BASE-R native mode

How to build

Run make to build. Ensure that the Intel Quartus Prime Pro toolchain components are in PATH.

Run make to build the driver. Ensure the headers for the running kernel are installed, otherwise the driver cannot be compiled.

How to test

Run make program to program the board with the Intel software. Then load the driver with insmod mqnic.ko. Check dmesg for output from driver initialization.