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corundum/fpga/mqnic/AU50/fpga_25g/rtl
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Alex Forencich 31ced63c91 fpga/mqnic: Add missing XGMII parameter connections 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-09-07 18:30:13 -07:00
..
common
Unified 10G/25G design for AU50
2022-03-14 21:36:30 -07:00
fpga_core.v
Update MAC and PHY instances
2023-08-28 17:22:34 -07:00
fpga.v
fpga/mqnic: Add missing XGMII parameter connections
2023-09-07 18:30:13 -07:00
sync_signal.v
Unified 10G/25G design for AU50
2022-03-14 21:36:30 -07:00