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141 lines
4.4 KiB
C
141 lines
4.4 KiB
C
// SPDX-License-Identifier: BSD-2-Clause-Views
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/*
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* Copyright 2019-2021, The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation
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* are those of the authors and should not be interpreted as representing
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* official policies, either expressed or implied, of The Regents of the
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* University of California.
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*/
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#include "mqnic.h"
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int mqnic_create_port(struct mqnic_priv *priv, struct mqnic_port **port_ptr,
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int index, u8 __iomem *hw_addr)
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{
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struct device *dev = priv->dev;
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struct mqnic_port *port;
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port = kzalloc(sizeof(*port), GFP_KERNEL);
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if (!port)
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return -ENOMEM;
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*port_ptr = port;
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port->dev = dev;
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port->ndev = priv->ndev;
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port->priv = priv;
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port->index = index;
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port->tx_queue_count = priv->tx_queue_count;
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port->hw_addr = hw_addr;
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// read ID registers
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port->port_id = ioread32(port->hw_addr + MQNIC_PORT_REG_PORT_ID);
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dev_info(dev, "Port ID: 0x%08x", port->port_id);
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port->port_features = ioread32(port->hw_addr + MQNIC_PORT_REG_PORT_FEATURES);
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dev_info(dev, "Port features: 0x%08x", port->port_features);
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port->port_mtu = ioread32(port->hw_addr + MQNIC_PORT_REG_PORT_MTU);
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dev_info(dev, "Port MTU: %d", port->port_mtu);
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port->sched_count = ioread32(port->hw_addr + MQNIC_PORT_REG_SCHED_COUNT);
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dev_info(dev, "Scheduler count: %d", port->sched_count);
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port->sched_offset = ioread32(port->hw_addr + MQNIC_PORT_REG_SCHED_OFFSET);
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dev_info(dev, "Scheduler offset: 0x%08x", port->sched_offset);
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port->sched_stride = ioread32(port->hw_addr + MQNIC_PORT_REG_SCHED_STRIDE);
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dev_info(dev, "Scheduler stride: 0x%08x", port->sched_stride);
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port->sched_type = ioread32(port->hw_addr + MQNIC_PORT_REG_SCHED_TYPE);
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dev_info(dev, "Scheduler type: 0x%08x", port->sched_type);
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mqnic_deactivate_port(port);
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return 0;
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}
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void mqnic_destroy_port(struct mqnic_port **port_ptr)
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{
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struct mqnic_port *port = *port_ptr;
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*port_ptr = NULL;
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mqnic_deactivate_port(port);
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kfree(port);
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}
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int mqnic_activate_port(struct mqnic_port *port)
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{
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int k;
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// enable schedulers
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iowrite32(0xffffffff, port->hw_addr + MQNIC_PORT_REG_SCHED_ENABLE);
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// enable queues
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for (k = 0; k < port->tx_queue_count; k++)
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iowrite32(3, port->hw_addr + port->sched_offset + k * 4);
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return 0;
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}
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void mqnic_deactivate_port(struct mqnic_port *port)
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{
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// disable schedulers
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iowrite32(0, port->hw_addr + MQNIC_PORT_REG_SCHED_ENABLE);
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}
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u32 mqnic_port_get_rss_mask(struct mqnic_port *port)
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{
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return ioread32(port->hw_addr + MQNIC_PORT_REG_RSS_MASK);
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}
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void mqnic_port_set_rss_mask(struct mqnic_port *port, u32 rss_mask)
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{
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iowrite32(rss_mask, port->hw_addr + MQNIC_PORT_REG_RSS_MASK);
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}
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u32 mqnic_port_get_tx_mtu(struct mqnic_port *port)
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{
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return ioread32(port->hw_addr + MQNIC_PORT_REG_TX_MTU);
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}
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void mqnic_port_set_tx_mtu(struct mqnic_port *port, u32 mtu)
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{
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iowrite32(mtu, port->hw_addr + MQNIC_PORT_REG_TX_MTU);
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}
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u32 mqnic_port_get_rx_mtu(struct mqnic_port *port)
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{
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return ioread32(port->hw_addr + MQNIC_PORT_REG_RX_MTU);
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}
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void mqnic_port_set_rx_mtu(struct mqnic_port *port, u32 mtu)
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{
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iowrite32(mtu, port->hw_addr + MQNIC_PORT_REG_RX_MTU);
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}
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