Alex Forencich 3d17cc1cee Adjust rate limiter framing logic

2015-05-12 17:58:09 -07:00

..

arbiter.v

Add LSB_PRIORITY parameter

2014-11-16 01:58:17 -08:00

axis_adapter.v

Fix last cycle detect logic

2015-04-19 23:33:34 -07:00

axis_arb_mux_4.v

Reverse priority in arbitrated mux

2014-11-16 02:00:27 -08:00

axis_arb_mux_64_4.v

Reverse priority in arbitrated mux

2014-11-16 02:00:27 -08:00

axis_arb_mux_64.py

Reverse priority in arbitrated mux

2014-11-16 02:00:27 -08:00

axis_arb_mux.py

Reverse priority in arbitrated mux

2014-11-16 02:00:27 -08:00

axis_async_fifo_64.v

Rework async FIFO resets and synchronization

2015-05-08 01:41:35 -07:00

axis_async_fifo.v

Rework async FIFO resets and synchronization

2015-05-08 01:41:35 -07:00

axis_async_frame_fifo_64.v

Add overflow, bad_frame, and good_frame status outputs to frame FIFOs

2015-05-12 17:52:41 -07:00

axis_async_frame_fifo.v

Add overflow, bad_frame, and good_frame status outputs to frame FIFOs

2015-05-12 17:52:41 -07:00

axis_crosspoint_4x4.v

Add tuser signal to crosspoint module

2014-11-21 01:07:02 -08:00

axis_crosspoint_64_4x4.v

Add tuser signal to crosspoint module

2014-11-21 01:07:02 -08:00

axis_crosspoint_64.py

Add tuser signal to crosspoint module

2014-11-21 01:07:02 -08:00

axis_crosspoint.py

Add tuser signal to crosspoint module

2014-11-21 01:07:02 -08:00

axis_demux_4.v

Add enable signal

2014-11-16 01:38:20 -08:00

axis_demux_64_4.v

Add enable signal

2014-11-16 01:38:20 -08:00

axis_demux_64.py

Add enable signal

2014-11-16 01:38:20 -08:00

axis_demux.py

Add enable signal

2014-11-16 01:38:20 -08:00

axis_fifo_64.v

Remove counter from AXI fifo modules

2014-11-08 12:45:36 -08:00

axis_fifo.v

Remove counter from AXI fifo modules

2014-11-08 12:45:36 -08:00

axis_frame_fifo_64.v

Add overflow, bad_frame, and good_frame status outputs to frame FIFOs

2015-05-12 17:52:41 -07:00

axis_frame_fifo.v

Add overflow, bad_frame, and good_frame status outputs to frame FIFOs

2015-05-12 17:52:41 -07:00

axis_frame_join_4.v

Parametrize tag and counter widths

2014-11-19 23:06:43 -08:00

axis_frame_join.py

Parametrize tag and counter widths

2014-11-19 23:06:43 -08:00

axis_ll_bridge.v

Add LocalLink to AXI stream bridge

2014-09-13 21:23:11 -07:00

axis_mux_4.v

Add enable signal

2014-11-16 01:38:20 -08:00

axis_mux_64_4.v

Add enable signal

2014-11-16 01:38:20 -08:00

axis_mux_64.py

Add enable signal

2014-11-16 01:38:20 -08:00

axis_mux.py

Add enable signal

2014-11-16 01:38:20 -08:00

axis_rate_limit_64.v

Adjust rate limiter framing logic

2015-05-12 17:58:09 -07:00

axis_rate_limit.v

Adjust rate limiter framing logic

2015-05-12 17:58:09 -07:00

axis_register_64.v

Improve output register filling

2014-10-22 15:09:48 -07:00

axis_register.v

Improve output register filling

2014-10-22 15:09:48 -07:00

axis_srl_fifo_64.v

Add SRL FIFO module and testbench

2014-12-03 18:49:33 -08:00

axis_srl_fifo.v

Add SRL FIFO module and testbench

2014-12-03 18:49:33 -08:00

axis_srl_register_64.v

Add SRL register module and testbench

2014-12-03 18:51:46 -08:00

axis_srl_register.v

Add SRL register module and testbench

2014-12-03 18:51:46 -08:00

axis_stat_counter.v

Fix register names

2014-12-03 13:15:13 -08:00

ll_axis_bridge.v

Add LocalLink to AXI stream bridge

2014-09-13 21:23:11 -07:00

priority_encoder.v

clog2 does not work in localparam in XST

2014-11-21 01:06:24 -08:00