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corundum/example/ZCU106/fpga_axi/tb
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Alex Forencich 5546e40812 Fix user_clk_frequency setting in testbenches
2020-10-12 23:05:28 -07:00
..
axis_ep.py
Add ZCU106 AXI example design
2020-08-06 18:25:34 -07:00
pcie_us.py
Add ZCU106 AXI example design
2020-08-06 18:25:34 -07:00
pcie_usp.py
Add ZCU106 AXI example design
2020-08-06 18:25:34 -07:00
pcie.py
Add ZCU106 AXI example design
2020-08-06 18:25:34 -07:00
test_fpga_core.py
Fix user_clk_frequency setting in testbenches
2020-10-12 23:05:28 -07:00
test_fpga_core.v
Add ZCU106 AXI example design
2020-08-06 18:25:34 -07:00