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corundum/example/VCU1525/fpga_axi/rtl
History
Alex Forencich 3bad28d626 Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
..
axi_ram.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
axis_register.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
debounce_switch.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
fpga_core.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
fpga.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
sync_reset.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00
sync_signal.v
Add VCU1525 AXI example design
2020-01-15 22:43:33 -08:00