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Corundum mqnic for NetFPGA SUME

Introduction

This design targets the NetFPGA SUME FPGA board.

FPGA: XC7VX690T-3FFG1761I PHY: 10G BASE-R PHY IP core and internal GTH transceiver

How to build

Run make to build. Ensure that the Xilinx Vivado toolchain components are in PATH.

Run make to build the driver. Ensure the headers for the running kernel are installed, otherwise the driver cannot be compiled.

How to test

Run make program to program the NetFPGA SUME board with Vivado. Then load the driver with insmod mqnic.ko. Check dmesg for output from driver initialization.