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FPGA
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corundum
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corundum
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example
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ATLYS
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fpga
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tb
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Alex Forencich
6a012c992b
Update example design to use FIFO wrapper
2015-05-08 00:45:27 -07:00
..
arp_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
axis_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
eth_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
gmii_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
ip_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
test_fpga_core.py
Update example design to use FIFO wrapper
2015-05-08 00:45:27 -07:00
test_fpga_core.v
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00
udp_ep.py
Add example design for Digilent Atlys board
2015-02-28 20:05:05 -08:00