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431 lines
11 KiB
C
431 lines
11 KiB
C
/*
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Copyright 2019, The Regents of the University of California.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS OF THE UNIVERSITY OF CALIFORNIA ''AS
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IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OF THE UNIVERSITY OF CALIFORNIA OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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The views and conclusions contained in the software and documentation are those
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of the authors and should not be interpreted as representing official policies,
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either expressed or implied, of The Regents of the University of California.
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*/
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#include "mqnic.h"
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#include <linux/module.h>
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#include <linux/version.h>
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#include <linux/delay.h>
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#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)
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#include <linux/pci-aspm.h>
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#endif
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MODULE_DESCRIPTION("mqnic driver");
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MODULE_AUTHOR("Alex Forencich");
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MODULE_LICENSE("Dual MIT/GPL");
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MODULE_VERSION(DRIVER_VERSION);
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MODULE_SUPPORTED_DEVICE(DRIVER_NAME);
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static const struct pci_device_id pci_ids[] = {
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{ PCI_DEVICE(0x1234, 0x1001) },
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{ PCI_DEVICE(0x5543, 0x1001) },
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{ 0 /* end */ }
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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static LIST_HEAD(mqnic_devices);
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static DEFINE_SPINLOCK(mqnic_devices_lock);
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static unsigned int mqnic_get_free_id(void)
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{
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struct mqnic_dev *mqnic;
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unsigned int id = 0;
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bool available = false;
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while (!available)
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{
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available = true;
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list_for_each_entry(mqnic, &mqnic_devices, dev_list_node)
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{
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if (mqnic->id == id)
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{
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available = false;
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id++;
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break;
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}
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}
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}
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return id;
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}
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struct mqnic_dev *mqnic_find_by_minor(unsigned minor)
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{
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struct mqnic_dev *mqnic;
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spin_lock(&mqnic_devices_lock);
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list_for_each_entry(mqnic, &mqnic_devices, dev_list_node)
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if (mqnic->misc_dev.minor == minor)
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goto done;
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mqnic = NULL;
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done:
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spin_unlock(&mqnic_devices_lock);
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return mqnic;
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}
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static irqreturn_t mqnic_interrupt(int irq, void *data)
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{
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struct mqnic_dev *mqnic = data;
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struct mqnic_priv *priv;
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int k, l;
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for (k = 0; k < MQNIC_MAX_IF; k++)
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{
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if (!mqnic->ndev[k])
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continue;
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priv = netdev_priv(mqnic->ndev[k]);
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if (unlikely(!priv->port_up))
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continue;
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for (l = 0; l < priv->event_queue_count; l++)
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{
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if (unlikely(!priv->event_ring[l]))
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continue;
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if (priv->event_ring[l]->irq == irq)
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{
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mqnic_process_eq(priv->ndev, priv->event_ring[l]);
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mqnic_arm_eq(priv->event_ring[l]);
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}
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}
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}
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return IRQ_HANDLED;
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}
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static int mqnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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int ret = 0;
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struct mqnic_dev *mqnic;
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struct device *dev = &pdev->dev;
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int k = 0;
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dev_info(dev, "mqnic probe");
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if (!(mqnic = devm_kzalloc(dev, sizeof(*mqnic), GFP_KERNEL)))
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{
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return -ENOMEM;
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}
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mqnic->dev = dev;
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mqnic->pdev = pdev;
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pci_set_drvdata(pdev, mqnic);
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mqnic->misc_dev.minor = MISC_DYNAMIC_MINOR;
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// assign ID and add to list
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spin_lock(&mqnic_devices_lock);
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mqnic->id = mqnic_get_free_id();
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list_add_tail(&mqnic->dev_list_node, &mqnic_devices);
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spin_unlock(&mqnic_devices_lock);
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snprintf(mqnic->name, sizeof(mqnic->name), DRIVER_NAME "%d", mqnic->id);
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// Disable ASPM
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pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
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// Enable device
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ret = pci_enable_device_mem(pdev);
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if (ret)
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{
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dev_err(dev, "Failed to enable PCI device");
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goto fail_enable_device;
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}
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// Set mask
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
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if (ret)
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{
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dev_warn(dev, "Warning: failed to set 64 bit PCI DMA mask");
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (ret)
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{
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dev_err(dev, "Failed to set PCI DMA mask");
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goto fail_regions;
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}
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}
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// Set max segment size
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dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
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// Reserve regions
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ret = pci_request_regions(pdev, DRIVER_NAME);
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if (ret)
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{
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dev_err(dev, "Failed to reserve regions");
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goto fail_regions;
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}
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mqnic->hw_regs_size = pci_resource_end(pdev, 0) - pci_resource_start(pdev, 0) + 1;
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mqnic->hw_regs_phys = pci_resource_start(pdev, 0);
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// Map BAR
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mqnic->hw_addr = pci_ioremap_bar(pdev, 0);
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if (!mqnic->hw_addr)
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{
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ret = -ENOMEM;
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dev_err(dev, "Failed to map BARs");
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goto fail_map_bars;
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}
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// Check if device needs to be reset
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if (ioread32(mqnic->hw_addr) == 0xffffffff)
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{
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ret = -EIO;
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dev_err(dev, "Deivce needs to be reset");
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goto fail_map_bars;
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}
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// Read ID registers
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mqnic->fw_id = ioread32(mqnic->hw_addr+MQNIC_REG_FW_ID);
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dev_info(dev, "FW ID: 0x%08x", mqnic->fw_id);
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mqnic->fw_ver = ioread32(mqnic->hw_addr+MQNIC_REG_FW_VER);
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dev_info(dev, "FW version: %d.%d", mqnic->fw_ver >> 16, mqnic->fw_ver & 0xffff);
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mqnic->board_id = ioread32(mqnic->hw_addr+MQNIC_REG_BOARD_ID);
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dev_info(dev, "Board ID: 0x%08x", mqnic->board_id);
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mqnic->board_ver = ioread32(mqnic->hw_addr+MQNIC_REG_BOARD_VER);
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dev_info(dev, "Board version: %d.%d", mqnic->board_ver >> 16, mqnic->board_ver & 0xffff);
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mqnic->phc_count = ioread32(mqnic->hw_addr+MQNIC_REG_PHC_COUNT);
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dev_info(dev, "PHC count: %d", mqnic->phc_count);
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mqnic->phc_offset = ioread32(mqnic->hw_addr+MQNIC_REG_PHC_OFFSET);
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dev_info(dev, "PHC offset: 0x%08x", mqnic->phc_offset);
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if (mqnic->phc_count)
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mqnic->phc_hw_addr = mqnic->hw_addr+mqnic->phc_offset;
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mqnic->if_count = ioread32(mqnic->hw_addr+MQNIC_REG_IF_COUNT);
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dev_info(dev, "IF count: %d", mqnic->if_count);
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mqnic->if_stride = ioread32(mqnic->hw_addr+MQNIC_REG_IF_STRIDE);
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dev_info(dev, "IF stride: 0x%08x", mqnic->if_stride);
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mqnic->if_csr_offset = ioread32(mqnic->hw_addr+MQNIC_REG_IF_CSR_OFFSET);
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dev_info(dev, "IF CSR offset: 0x%08x", mqnic->if_csr_offset);
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// check BAR size
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if (mqnic->if_count*mqnic->if_stride > mqnic->hw_regs_size)
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{
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ret = -EIO;
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dev_err(dev, "Invalid BAR configuration (%d IF * 0x%x > 0x%lx)", mqnic->if_count, mqnic->if_stride, mqnic->hw_regs_size);
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goto fail_map_bars;
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}
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// Allocate MSI IRQs
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mqnic->msi_nvecs = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
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if (mqnic->msi_nvecs < 0)
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{
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ret = -ENOMEM;
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dev_err(dev, "Failed to allocate IRQs");
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goto fail_map_bars;
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}
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// Set up interrupts
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for (k = 0; k < mqnic->msi_nvecs; k++)
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{
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ret = pci_request_irq(pdev, k, mqnic_interrupt, 0, mqnic, "mqnic%d-%d", mqnic->id, k);
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if (ret < 0)
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{
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dev_err(dev, "Failed to request IRQ");
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goto fail_irq;
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}
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}
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// Set up I2C interfaces
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ret = mqnic_init_i2c(mqnic);
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if (ret)
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{
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dev_err(dev, "Failed to register I2C interfaces");
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goto fail_i2c;
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}
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// Read MAC from EEPROM
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if (mqnic->eeprom_i2c_client)
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{
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ret = i2c_smbus_read_i2c_block_data(mqnic->eeprom_i2c_client, 0x00, 6, mqnic->base_mac);
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if (ret < 0)
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{
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dev_warn(dev, "Failed to read MAC from EEPROM");
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}
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}
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else
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{
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dev_warn(dev, "Failed to read MAC from EEPROM; no EEPROM I2C client registered");
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}
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// Enable bus mastering for DMA
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pci_set_master(pdev);
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// register PHC
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if (mqnic->phc_count)
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{
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mqnic_register_phc(mqnic);
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}
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// Set up interfaces
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if (mqnic->if_count > MQNIC_MAX_IF)
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mqnic->if_count = MQNIC_MAX_IF;
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for (k = 0; k < mqnic->if_count; k++)
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{
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dev_info(dev, "Creating interface %d", k);
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ret = mqnic_init_netdev(mqnic, k, mqnic->hw_addr + k*mqnic->if_stride);
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if (ret)
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{
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dev_err(dev, "Failed to create net_device");
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goto fail_init_netdev;
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}
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}
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mqnic->misc_dev.name = mqnic->name;
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mqnic->misc_dev.fops = &mqnic_fops;
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mqnic->misc_dev.parent = dev;
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ret = misc_register(&mqnic->misc_dev);
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if (ret)
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{
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dev_err(dev, "misc_register failed: %d\n", ret);
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goto fail_miscdev;
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}
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pci_save_state(pdev);
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mutex_init(&mqnic->state_lock);
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// probe complete
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return 0;
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// error handling
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fail_miscdev:
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fail_init_netdev:
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for (k = 0; k < MQNIC_MAX_IF; k++)
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{
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if (mqnic->ndev[k])
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{
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mqnic_destroy_netdev(mqnic->ndev[k]);
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}
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}
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mqnic_unregister_phc(mqnic);
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pci_clear_master(pdev);
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fail_i2c:
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mqnic_remove_i2c(mqnic);
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for (k = 0; k < mqnic->msi_nvecs; k++)
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{
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pci_free_irq(pdev, k, mqnic);
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}
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fail_irq:
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pci_free_irq_vectors(pdev);
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fail_map_bars:
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pci_iounmap(pdev, mqnic->hw_addr);
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pci_release_regions(pdev);
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fail_regions:
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pci_disable_device(pdev);
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fail_enable_device:
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spin_lock(&mqnic_devices_lock);
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list_del(&mqnic->dev_list_node);
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spin_unlock(&mqnic_devices_lock);
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return ret;
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}
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static void mqnic_remove(struct pci_dev *pdev)
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{
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struct mqnic_dev *mqnic = pci_get_drvdata(pdev);
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int k = 0;
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dev_info(&pdev->dev, "mqnic remove");
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misc_deregister(&mqnic->misc_dev);
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spin_lock(&mqnic_devices_lock);
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list_del(&mqnic->dev_list_node);
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spin_unlock(&mqnic_devices_lock);
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for (k = 0; k < MQNIC_MAX_IF; k++)
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{
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if (mqnic->ndev[k])
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{
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mqnic_destroy_netdev(mqnic->ndev[k]);
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}
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}
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mqnic_unregister_phc(mqnic);
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pci_clear_master(pdev);
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mqnic_remove_i2c(mqnic);
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for (k = 0; k < mqnic->msi_nvecs; k++)
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{
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pci_free_irq(pdev, k, mqnic);
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}
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pci_free_irq_vectors(pdev);
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pci_iounmap(pdev, mqnic->hw_addr);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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}
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static void mqnic_shutdown(struct pci_dev *pdev)
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{
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dev_info(&pdev->dev, "mqnic shutdown");
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mqnic_remove(pdev);
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}
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static struct pci_driver pci_driver = {
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.name = DRIVER_NAME,
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.id_table = pci_ids,
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.probe = mqnic_probe,
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.remove = mqnic_remove,
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.shutdown = mqnic_shutdown
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};
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static int __init mqnic_init(void)
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{
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return pci_register_driver(&pci_driver);
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}
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static void __exit mqnic_exit(void)
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{
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pci_unregister_driver(&pci_driver);
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}
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module_init(mqnic_init);
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module_exit(mqnic_exit);
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