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History

Alex Forencich d0ce01de7f fpga/mqnic/S10DX_DK: fix typo

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2022-08-05 16:28:15 -07:00

common

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

fpga

fpga/mqnic: Clean up PCIe DMA IF flow control connections

2022-08-03 23:04:05 -07:00

fpga_10g

fpga/mqnic: Clean up PCIe DMA IF flow control connections

2022-08-03 23:04:05 -07:00

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

rtl

fpga/mqnic/S10DX_DK: fix typo

2022-08-05 16:28:15 -07:00

tb/fpga_core

fpga/mqnic: Clean up PCIe DMA IF flow control connections

2022-08-03 23:04:05 -07:00

app

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

fpga.qsf

fpga/mqnic: Add RAM inference directive to Intel designs

2022-08-05 16:27:29 -07:00

fpga.sdc

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

lib

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

README.md

Add 25g mqnic design for Stratix 10 DX dev kit

2022-07-23 19:42:58 -07:00

README.md

Corundum mqnic for Stratix 10 DX

Introduction

This design targets the Intel Stratix 10 DX FPGA development board.

FPGA: 1SD280PT2F55E1VG
PHY: E-Tile

How to build

Run make to build. Ensure that the Intel Quartus Prime Pro toolchain components are in PATH.

Run make to build the driver. Ensure the headers for the running kernel are installed, otherwise the driver cannot be compiled.

How to test

Run make program to program the board with the Intel software. Then load the driver with insmod mqnic.ko. Check dmesg for output from driver initialization.