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corundum
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corundum
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fpga
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mqnic
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AU280
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fpga_10g
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rtl
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Alex Forencich
3997e0d95b
Parametriztion updates, add RAM_ADDR_WIDTH as a top-level parameter
2022-02-15 18:01:43 -08:00
..
common
Add 10G mqnic design for Alveo U280
2020-07-12 11:33:18 -07:00
eth_xcvr_phy_quad_wrapper.v
Add transceiver quad wrappers
2022-01-16 18:28:22 -08:00
eth_xcvr_phy_wrapper.v
Rework GT instances in Alveo U280 10G design
2021-10-21 21:49:27 -07:00
fpga_core.v
Parametriztion updates, add RAM_ADDR_WIDTH as a top-level parameter
2022-02-15 18:01:43 -08:00
fpga.v
Parametriztion updates, add RAM_ADDR_WIDTH as a top-level parameter
2022-02-15 18:01:43 -08:00
sync_signal.v
Add default_nettype none and resetall directives
2021-10-20 21:53:39 -07:00
