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corundum/fpga/mqnic/ZCU106/fpga_pcie
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Alex Forencich 33b798540e Change hex format in makefiles 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-07-09 14:20:48 -07:00
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common
Update vivado.mk
2021-12-20 22:03:06 -08:00
fpga
Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
2022-07-08 22:07:18 -07:00
ip
Switch to MSI-X
2022-06-02 23:58:29 -07:00
rtl
Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
2022-07-08 22:07:18 -07:00
tb/fpga_core
Change hex format in makefiles
2022-07-09 14:20:48 -07:00
app
Update ZCU106 design
2021-09-12 23:17:01 -07:00
fpga.xdc
Update ZCU106 XDC
2021-02-05 22:22:25 -08:00
lib
Add PCIe mqnic design for ZCU106
2020-08-06 23:25:23 -07:00
Makefile
Add PCIe mqnic design for ZCU106
2020-08-06 23:25:23 -07:00
README.md
Add PCIe mqnic design for ZCU106
2020-08-06 23:25:23 -07:00

README.md

Corundum mqnic for ZCU106

Introduction

This design targets the Xilinx ZCU106 FPGA board.

FPGA: xczu7ev-ffvc1156-2-e PHY: 10G BASE-R PHY IP core and internal GTH transceiver

How to build

Run make to build. Ensure that the Xilinx Vivado toolchain components are in PATH.

Run make to build the driver. Ensure the headers for the running kernel are installed, otherwise the driver cannot be compiled.

How to test

Run make program to program the ZCU106 board with Vivado. Then load the driver with insmod mqnic.ko. Check dmesg for output from driver initialization.