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385 lines
11 KiB
C
385 lines
11 KiB
C
/*
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Copyright 2019, The Regents of the University of California.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS OF THE UNIVERSITY OF CALIFORNIA ''AS
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IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OF THE UNIVERSITY OF CALIFORNIA OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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The views and conclusions contained in the software and documentation are those
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of the authors and should not be interpreted as representing official policies,
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either expressed or implied, of The Regents of the University of California.
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*/
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#ifndef MQNIC_H
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#define MQNIC_H
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/miscdevice.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/net_tstamp.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#define DRIVER_NAME "mqnic"
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#define DRIVER_VERSION "0.1"
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#include "mqnic_hw.h"
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struct mqnic_i2c_priv
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{
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struct mqnic_dev *mqnic;
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u8 __iomem *scl_in_reg;
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u8 __iomem *scl_out_reg;
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u8 __iomem *sda_in_reg;
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u8 __iomem *sda_out_reg;
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uint32_t scl_in_mask;
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uint32_t scl_out_mask;
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uint32_t sda_in_mask;
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uint32_t sda_out_mask;
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};
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struct mqnic_dev {
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struct device *dev;
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struct pci_dev *pdev;
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size_t hw_regs_size;
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phys_addr_t hw_regs_phys;
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u8 __iomem *hw_addr;
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u8 __iomem *phc_hw_addr;
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struct mutex state_lock;
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u8 base_mac[ETH_ALEN];
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char name[16];
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int irq_count;
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int irq_map[32];
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unsigned int id;
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struct list_head dev_list_node;
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struct miscdevice misc_dev;
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u32 fw_id;
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u32 fw_ver;
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u32 board_id;
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u32 board_ver;
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u32 phc_count;
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u32 phc_offset;
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u32 if_count;
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u32 if_stride;
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u32 if_csr_offset;
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struct net_device *ndev[MQNIC_MAX_IF];
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_info;
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int i2c_adapter_count;
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struct i2c_algo_bit_data i2c_algo[MQNIC_MAX_I2C_ADAPTERS];
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struct i2c_adapter i2c_adapter[MQNIC_MAX_I2C_ADAPTERS];
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struct mqnic_i2c_priv i2c_priv[MQNIC_MAX_I2C_ADAPTERS];
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struct i2c_client *eeprom_i2c_client;
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};
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struct mqnic_frag {
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dma_addr_t dma_addr;
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u32 len;
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};
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struct mqnic_tx_info {
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struct sk_buff *skb;
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DEFINE_DMA_UNMAP_ADDR(dma_addr);
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DEFINE_DMA_UNMAP_LEN(len);
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u32 frag_count;
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struct mqnic_frag frags[MQNIC_MAX_FRAGS-1];
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int ts_requested;
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};
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struct mqnic_rx_info {
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struct page *page;
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u32 page_order;
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u32 page_offset;
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dma_addr_t dma_addr;
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u32 len;
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};
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struct mqnic_ring {
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// written on enqueue (i.e. start_xmit)
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u32 head_ptr;
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u64 bytes;
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u64 packets;
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u64 dropped_packets;
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struct netdev_queue *tx_queue;
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// written from completion
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u32 tail_ptr ____cacheline_aligned_in_smp;
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u32 clean_tail_ptr;
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u64 ts_s;
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u8 ts_valid;
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// mostly constant
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u32 size;
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u32 full_size;
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u32 size_mask;
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u32 stride;
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u32 cpl_index;
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u32 mtu;
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u32 page_order;
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u32 desc_block_size;
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u32 log_desc_block_size;
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size_t buf_size;
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u8 *buf;
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dma_addr_t buf_dma_addr;
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union {
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struct mqnic_tx_info *tx_info;
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struct mqnic_rx_info *rx_info;
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};
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u32 hw_ptr_mask;
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u8 __iomem *hw_addr;
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u8 __iomem *hw_head_ptr;
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u8 __iomem *hw_tail_ptr;
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} ____cacheline_aligned_in_smp;
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struct mqnic_cq_ring {
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u32 head_ptr;
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u32 tail_ptr;
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u32 size;
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u32 size_mask;
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u32 stride;
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size_t buf_size;
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u8 *buf;
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dma_addr_t buf_dma_addr;
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struct net_device *ndev;
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struct napi_struct napi;
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int ring_index;
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int eq_index;
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void (*handler) (struct mqnic_cq_ring *);
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u32 hw_ptr_mask;
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u8 __iomem *hw_addr;
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u8 __iomem *hw_head_ptr;
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u8 __iomem *hw_tail_ptr;
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};
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struct mqnic_eq_ring {
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u32 head_ptr;
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u32 tail_ptr;
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u32 size;
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u32 size_mask;
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u32 stride;
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size_t buf_size;
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u8 *buf;
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dma_addr_t buf_dma_addr;
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struct net_device *ndev;
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int int_index;
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int irq;
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void (*handler) (struct mqnic_eq_ring *);
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u32 hw_ptr_mask;
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u8 __iomem *hw_addr;
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u8 __iomem *hw_head_ptr;
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u8 __iomem *hw_tail_ptr;
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};
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struct mqnic_port {
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struct device *dev;
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struct net_device *ndev;
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int index;
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u32 tx_queue_count;
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u32 port_id;
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u32 port_features;
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u32 port_mtu;
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u32 sched_count;
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u32 sched_offset;
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u32 sched_stride;
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u32 sched_type;
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u8 __iomem *hw_addr;
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};
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struct mqnic_priv {
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struct device *dev;
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struct net_device *ndev;
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struct mqnic_dev *mdev;
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spinlock_t stats_lock;
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bool registered;
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int port;
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bool port_up;
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u32 if_id;
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u32 if_features;
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u32 event_queue_count;
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u32 event_queue_offset;
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u32 tx_queue_count;
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u32 tx_queue_offset;
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u32 tx_cpl_queue_count;
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u32 tx_cpl_queue_offset;
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u32 rx_queue_count;
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u32 rx_queue_offset;
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u32 rx_cpl_queue_count;
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u32 rx_cpl_queue_offset;
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u32 port_count;
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u32 port_offset;
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u32 port_stride;
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u32 max_desc_block_size;
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u8 __iomem *hw_addr;
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u8 __iomem *csr_hw_addr;
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struct mqnic_eq_ring *event_ring[MQNIC_MAX_EVENT_RINGS];
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struct mqnic_ring *tx_ring[MQNIC_MAX_TX_RINGS];
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struct mqnic_cq_ring *tx_cpl_ring[MQNIC_MAX_TX_CPL_RINGS];
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struct mqnic_ring *rx_ring[MQNIC_MAX_RX_RINGS];
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struct mqnic_cq_ring *rx_cpl_ring[MQNIC_MAX_RX_CPL_RINGS];
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struct mqnic_port *ports[MQNIC_MAX_PORTS];
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struct hwtstamp_config hwts_config;
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};
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// mqnic_main.c
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// mqnic_dev.c
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extern const struct file_operations mqnic_fops;
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// mqnic_netdev.c
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void mqnic_update_stats(struct net_device *ndev);
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int mqnic_init_netdev(struct mqnic_dev *mdev, int port, u8 __iomem *hw_addr);
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void mqnic_destroy_netdev(struct net_device *ndev);
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// mqnic_port.c
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int mqnic_create_port(struct mqnic_priv *priv, struct mqnic_port **port_ptr, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_port(struct mqnic_priv *priv, struct mqnic_port **port_ptr);
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int mqnic_activate_port(struct mqnic_port *port);
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void mqnic_deactivate_port(struct mqnic_port *port);
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u32 mqnic_port_get_rss_mask(struct mqnic_port *port);
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void mqnic_port_set_rss_mask(struct mqnic_port *port, u32 rss_mask);
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u32 mqnic_port_get_tx_mtu(struct mqnic_port *port);
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void mqnic_port_set_tx_mtu(struct mqnic_port *port, u32 mtu);
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u32 mqnic_port_get_rx_mtu(struct mqnic_port *port);
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void mqnic_port_set_rx_mtu(struct mqnic_port *port, u32 mtu);
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// mqnic_ptp.c
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void mqnic_register_phc(struct mqnic_dev *mdev);
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void mqnic_unregister_phc(struct mqnic_dev *mdev);
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ktime_t mqnic_read_cpl_ts(struct mqnic_dev *mdev, struct mqnic_ring *ring, const struct mqnic_cpl *cpl);
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// mqnic_i2c.c
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int mqnic_init_i2c(struct mqnic_dev *mqnic);
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void mqnic_remove_i2c(struct mqnic_dev *mqnic);
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// mqnic_eq.c
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int mqnic_create_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr);
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int mqnic_activate_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring *ring, int int_index);
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void mqnic_deactivate_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring *ring);
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bool mqnic_is_eq_ring_empty(const struct mqnic_eq_ring *ring);
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bool mqnic_is_eq_ring_full(const struct mqnic_eq_ring *ring);
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void mqnic_eq_read_head_ptr(struct mqnic_eq_ring *ring);
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void mqnic_eq_write_tail_ptr(struct mqnic_eq_ring *ring);
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void mqnic_arm_eq(struct mqnic_eq_ring *ring);
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void mqnic_process_eq(struct net_device *ndev, struct mqnic_eq_ring *eq_ring);
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// mqnic_cq.c
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int mqnic_create_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring **ring_ptr);
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int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring, int eq_index);
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void mqnic_deactivate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring);
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bool mqnic_is_cq_ring_empty(const struct mqnic_cq_ring *ring);
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bool mqnic_is_cq_ring_full(const struct mqnic_cq_ring *ring);
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void mqnic_cq_read_head_ptr(struct mqnic_cq_ring *ring);
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void mqnic_cq_write_tail_ptr(struct mqnic_cq_ring *ring);
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void mqnic_arm_cq(struct mqnic_cq_ring *ring);
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// mqnic_tx.c
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int mqnic_create_tx_ring(struct mqnic_priv *priv, struct mqnic_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_tx_ring(struct mqnic_priv *priv, struct mqnic_ring **ring_ptr);
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int mqnic_activate_tx_ring(struct mqnic_priv *priv, struct mqnic_ring *ring, int cpl_index);
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void mqnic_deactivate_tx_ring(struct mqnic_priv *priv, struct mqnic_ring *ring);
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bool mqnic_is_tx_ring_empty(const struct mqnic_ring *ring);
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bool mqnic_is_tx_ring_full(const struct mqnic_ring *ring);
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void mqnic_tx_read_tail_ptr(struct mqnic_ring *ring);
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void mqnic_tx_write_head_ptr(struct mqnic_ring *ring);
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void mqnic_free_tx_desc(struct mqnic_priv *priv, struct mqnic_ring *ring, int index, int napi_budget);
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int mqnic_free_tx_buf(struct mqnic_priv *priv, struct mqnic_ring *ring);
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int mqnic_process_tx_cq(struct net_device *ndev, struct mqnic_cq_ring *cq_ring, int napi_budget);
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void mqnic_tx_irq(struct mqnic_cq_ring *cq);
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int mqnic_poll_tx_cq(struct napi_struct *napi, int budget);
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netdev_tx_t mqnic_start_xmit(struct sk_buff *skb, struct net_device *dev);
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// mqnic_rx.c
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int mqnic_create_rx_ring(struct mqnic_priv *priv, struct mqnic_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_rx_ring(struct mqnic_priv *priv, struct mqnic_ring **ring_ptr);
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int mqnic_activate_rx_ring(struct mqnic_priv *priv, struct mqnic_ring *ring, int cpl_index);
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void mqnic_deactivate_rx_ring(struct mqnic_priv *priv, struct mqnic_ring *ring);
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bool mqnic_is_rx_ring_empty(const struct mqnic_ring *ring);
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bool mqnic_is_rx_ring_full(const struct mqnic_ring *ring);
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void mqnic_rx_read_tail_ptr(struct mqnic_ring *ring);
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void mqnic_rx_write_head_ptr(struct mqnic_ring *ring);
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void mqnic_free_rx_desc(struct mqnic_priv *priv, struct mqnic_ring *ring, int index);
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int mqnic_free_rx_buf(struct mqnic_priv *priv, struct mqnic_ring *ring);
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int mqnic_prepare_rx_desc(struct mqnic_priv *priv, struct mqnic_ring *ring, int index);
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void mqnic_refill_rx_buffers(struct mqnic_priv *priv, struct mqnic_ring *ring);
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int mqnic_process_rx_cq(struct net_device *ndev, struct mqnic_cq_ring *cq_ring, int napi_budget);
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void mqnic_rx_irq(struct mqnic_cq_ring *cq);
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int mqnic_poll_rx_cq(struct napi_struct *napi, int budget);
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// mqnic_ethtool.c
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extern const struct ethtool_ops mqnic_ethtool_ops;
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#endif /* MQNIC_H */
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