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110 lines
3.5 KiB
ReStructuredText
110 lines
3.5 KiB
ReStructuredText
.. _mod_mqnic_l2_ingress:
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====================
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``mqnic_l2_ingress``
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====================
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``mqnic_l2_ingress`` contains layer 2 ingress processing components, and operates synchronous to the MAC RX clock. Currently, this module is a placeholder, passing through streaming data without modification.
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Parameters
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==========
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.. object:: AXIS_DATA_WIDTH
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Streaming interface ``tdata`` signal width, default ``512``.
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.. object:: AXIS_KEEP_WIDTH
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Streaming interface ``tkeep`` signal width, must be set to ``AXIS_DATA_WIDTH/8``.
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.. object:: AXIS_USER_WIDTH
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Streaming interface ``tuser`` signal width, default ``1``.
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.. object:: AXIS_USE_READY
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Use ``tready`` signal, default ``0``. If set, logic will exert backpressure with ``tready`` instead of dropping packets when RX FIFOs are full.
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Ports
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=====
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.. object:: clk
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Logic clock.
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.. table::
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====== === ===== ==================
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Signal Dir Width Description
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====== === ===== ==================
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clk in 1 Logic clock
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====== === ===== ==================
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.. object:: rst
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Logic reset, active high
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.. table::
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====== === ===== ==================
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Signal Dir Width Description
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====== === ===== ==================
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rst in 1 Logic reset, active high
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====== === ===== ==================
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.. object:: s_axis
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Streaming receive data from network
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.. table::
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============= === =============== ==================
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Signal Dir Width Description
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============= === =============== ==================
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s_axis_tdata in AXIS_DATA_WIDTH Streaming data
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s_axis_tkeep in AXIS_KEEP_WIDTH Byte enable
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s_axis_tvalid in Data valid
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s_axis_tready out Ready for data
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s_axis_tlast in End of frame
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s_axis_tuser in AXIS_USER_WIDTH Sideband data
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============= === =============== ==================
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``s_axis_tuser`` bits
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.. table::
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============== ========= ============ =============
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Bit Name Width Description
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============== ========= ============ =============
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0 bad_frame 1 Invalid frame
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PTP_TS_WIDTH:1 ptp_ts PTP_TS_WIDTH PTP timestamp
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============== ========= ============ =============
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.. object:: m_axis
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Streaming receive data towards host
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.. table::
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============= === =============== ==================
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Signal Dir Width Description
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============= === =============== ==================
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m_axis_tdata out AXIS_DATA_WIDTH Streaming data
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m_axis_tkeep out AXIS_KEEP_WIDTH Byte enable
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m_axis_tvalid out Data valid
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m_axis_tready in Ready for data
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m_axis_tlast out End of frame
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m_axis_tuser out AXIS_USER_WIDTH Sideband data
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============= === =============== ==================
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``m_axis_tuser`` bits
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.. table::
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============== ========= ============ =============
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Bit Name Width Description
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============== ========= ============ =============
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0 bad_frame 1 Invalid frame
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PTP_TS_WIDTH:1 ptp_ts PTP_TS_WIDTH PTP timestamp
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============== ========= ============ =============
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