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corundum
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corundum
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fpga
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mqnic
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AU250
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fpga_10g
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rtl
History
Alex Forencich
e0e34a9f0d
Update designs for PCIe module changes
2021-08-02 23:04:52 -07:00
..
common
Add 10G mqnic design for Alveo U250
2020-09-22 01:00:42 -07:00
debounce_switch.v
Add 10G mqnic design for Alveo U250
2020-09-22 01:00:42 -07:00
fpga_core.v
Update designs for PCIe module changes
2021-08-02 23:04:52 -07:00
fpga.v
Add cfgmclk timing constraints, rework reset connections
2021-02-05 18:00:56 -08:00
sync_signal.v
Add 10G mqnic design for Alveo U250
2020-09-22 01:00:42 -07:00