Alex Forencich e3f2d8990d fpga/mqnic: Use all ports for TDMA designs ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2022-10-15 23:30:54 -07:00

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250_SoC

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

ADM_PCIE_9V3

fpga/mqnic: Use all ports for TDMA designs

2022-10-15 23:30:54 -07:00

AU50

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

AU200

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

AU250

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

AU280

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

DE10_Agilex

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

DNPCIe_40G_KU_LL_2QSFP/fpga

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

fb2CG

fpga/mqnic: Use all ports for TDMA designs

2022-10-15 23:30:54 -07:00

NetFPGA_SUME/fpga

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

Nexus_K3P_Q/fpga_25g

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

Nexus_K3P_S/fpga_25g

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

Nexus_K35_S/fpga

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

S10DX_DK/fpga_25g

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

S10MX_DK/fpga_25g

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

VCU108/fpga_25g

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

VCU118

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

VCU1525

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

XUPP3R

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

ZCU102/fpga

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00

ZCU106

fpga: Add clock info register block

2022-10-15 19:45:02 -07:00