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corundum/example/VCU1525/fpga_10g/rtl
History
Alex Forencich fd908dd2aa Clean up clock connections
2020-08-06 17:15:38 -07:00
..
debounce_switch.v
Add VCU1525 10G example design
2020-01-15 23:14:08 -08:00
fpga_core.v
Parametrize Ethernet frame parsing
2020-02-21 21:37:57 -08:00
fpga.v
Clean up clock connections
2020-08-06 17:15:38 -07:00
sync_signal.v
Add VCU1525 10G example design
2020-01-15 23:14:08 -08:00