2015-02-25 19:56:56 -08:00
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# General
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*~
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*.swp
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*.out
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2016-03-03 17:07:05 +05:30
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*.coverage
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2015-02-25 19:56:56 -08:00
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build/
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2016-03-05 10:06:59 +01:00
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.cache
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2016-05-10 14:09:01 +02:00
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.style.yapf
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2015-02-25 19:56:56 -08:00
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# Python
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*.py[cod]
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__pycache__/
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*egg-info/
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dist/
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2015-04-15 16:49:24 -04:00
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.tox
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2015-02-25 19:56:56 -08:00
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# Cosim
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*.o
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*.vpi
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2015-04-23 10:55:50 -04:00
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*.so
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2015-02-25 19:56:56 -08:00
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# Simulator generated files
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*.vcd
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modelsim.ini
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transcript
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*.log
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work/
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2015-07-18 09:39:06 -04:00
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work_nvc/
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2015-02-25 19:56:56 -08:00
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work_vlog/
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work_vcom/
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*.wlf
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# Test artifacts
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myhdl/**/*.v
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myhdl/**/*.vhd
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2016-09-01 12:01:02 -04:00
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# Pycharm ide junk
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.idea/
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2021-03-06 20:11:17 +01:00
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/.pytest_cache/
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Update makeflow (#396)
* Clean up verify convert warnings
* Rewrote test and remove Xfail, test is passing now (is it supposed to fail?)
* Rewrote test and remove Xfail, test is passing now (is it supposed to fail?)
* Fixed all tests to handle the analyze/verify deprecation
* Fixed to catch the correct error, List of signals as a port is not supported
* Add a way to search for and add myhdl.vpi
* Add explict test to check for deprecation case
* Change warning from UserWarning (which is the default) to DeprecationWarning
* Change test operation from script to makefile
* No longer use travis
* Add some ANSI colored logging
* Fixed test to look for DeprecationWarning
* Add lining step
* Add linting step
* Add linting step
* Remove matrix step
* Add work/ to clean list
* Hide echo commands in window
* The word test is reserved in pytest only for tests, doen't use it for any thing else, like blocks
* Add myhdl.vpi to clean
* Mark these tests as xfail, for now,
* Fix and unmark xfail 2 tests
* Add black support
* Remove python2 only testing
* Need to relook at this test, it performs differently for verilog and vhdl
* Add RTL files to the list
* Need to relook at this test, it performs differently for verilog and vhdl
* Upgrade to DeprecationWarnings
* Initial checkin with passing flow for new convert VHDL/Verilog, there are a few xfail tests that need to be debugged
* Add more examples for the Deprecation cases, toVHDL and toVerilog
* Fix deprecations catching
* Fix pytest to use pytest.ini
* Add pypi release steps
* Fix intbv error
* Fix indent
* Update to do a release
* Add checkout to step
* Update Python versions
* Add dependancy on tag on push
2022-12-17 12:21:08 +00:00
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*.hex
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*.vhd
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*.v
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