FPGA/myhdl
1
0
Fork 0
mirror of https://github.com/myhdl/myhdl.git synced 2025-01-24 21:52:56 +08:00
Code Issues Projects Releases Wiki Activity

proof reading

Browse Source
This commit is contained in:
jand 2003-03-07 09:54:01 +00:00
parent 128aab8fbd
commit 00a0f20844
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
doc/unittest.tex
View File

@ -98,11 +98,11 @@ most importantly, the test is available when you are done
implementing, and can be run anytime by anybody to verify changes.
Python has a standard \code{unittest} module that facilitates writing,
managing and running unit tests. With \code{unittest}, test case are
managing and running unit tests. With \code{unittest}, test cases are
written by creating a class that inherits from
\code{unittest.TestCase}. Individual tests are created by methods of
that class: all methods that start with \code{test} are considered to
be tests of the test case.
that class: all method names that start with \code{test} are
considered to be tests of the test case.
We will define a test case for the Gray code properties, and then
write a test for each of the requirements. The outline of the test