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[ENH] Updated the ConcatSignal conversion code to check for undriven … (#371)
* [ENH] Updated the ConcatSignal conversion code to check for undriven signals. * [ENH] Added a test to check the undriven ConcatSignal converts sensibly.
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@ -196,8 +196,39 @@ class ConcatSignal(_ShadowSignal):
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else:
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w = len(a)
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lo = hi - w
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if isinstance(a, _Signal) and a._name is None:
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# We have seen a bug when a concat signal is created in the
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# following way:
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#
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# sig_list = [Signal(False) for n in range(32)]
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# concat_sig = ConcatSignal(*reversed(sig_list))
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#
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# It seems that the _name attribute on the signals in sig_list
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# is only updated if an assignment is made to them. Otherwise
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# _name is left as None. We need to check for None and raise
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# a warning.
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from myhdl.conversion._misc import _error
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from myhdl import ToVHDLWarning
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if w == 1:
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warnings.warn(
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"%s: %s[%s]" % (_error.UndrivenSignal, self._name, lo),
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category=ToVHDLWarning)
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else:
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warnings.warn(
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"%s: %s[%s:%s]" % (_error.UndrivenSignal, self._name, hi, lo),
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category=ToVHDLWarning)
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if w == 1:
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if isinstance(a, _Signal):
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if isinstance(a, _Signal) and a._name is not None:
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# Check that a._name is not None as None should not be
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# written into the converted code. If it is None then we
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# assume no assignment has been made to the signal
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# (otherwise the _name attribute would have been updated
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# by the _analyzeSigs function). In this situation the
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# signal should hold its init value (as handled in the
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# else branch).
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if a._type == bool: # isinstance(a._type , bool): <- doesn't work
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lines.append("%s(%s) <= %s;" % (self._name, lo, a._name))
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else:
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@ -205,7 +236,9 @@ class ConcatSignal(_ShadowSignal):
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else:
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lines.append("%s(%s) <= '%s';" % (self._name, lo, bin(ini[lo])))
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else:
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if isinstance(a, _Signal):
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if isinstance(a, _Signal) and a._name is not None:
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# Check that a._name is not None as None should not be
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# written into the converted code
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lines.append("%s(%s-1 downto %s) <= %s;" % (self._name, hi, lo, a._name))
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else:
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lines.append('%s(%s-1 downto %s) <= "%s";' %
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@ -223,8 +256,39 @@ class ConcatSignal(_ShadowSignal):
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else:
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w = len(a)
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lo = hi - w
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if isinstance(a, _Signal) and a._name is None:
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# We have seen a bug when a concat signal is created in the
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# following way:
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#
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# sig_list = [Signal(False) for n in range(32)]
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# concat_sig = ConcatSignal(*reversed(sig_list))
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#
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# It seems that the _name attribute on the signals in sig_list
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# is only updated if an assignment is made to them. Otherwise
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# _name is left as None. We need to check for None and raise
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# a warning.
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from myhdl.conversion._misc import _error
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from myhdl import ToVerilogWarning
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if w == 1:
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warnings.warn(
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"%s: %s[%s]" % (_error.UndrivenSignal, self._name, lo),
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category=ToVerilogWarning)
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else:
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warnings.warn(
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"%s: %s[%s:%s]" % (_error.UndrivenSignal, self._name, hi, lo),
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category=ToVerilogWarning)
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if w == 1:
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if isinstance(a, _Signal):
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if isinstance(a, _Signal) and a._name is not None:
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# Check that a._name is not None as None should not be
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# written into the converted code. If it is None then we
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# assume no assignment has been made to the signal
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# (otherwise the _name attribute would have been updated
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# by the _analyzeSigs function). In this situation the
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# signal should hold its init value (as handled in the
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# else branch).
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if a._type == bool:
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lines.append("assign %s[%s] = %s;" % (self._name, lo, a._name))
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else:
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@ -232,7 +296,9 @@ class ConcatSignal(_ShadowSignal):
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else:
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lines.append("assign %s[%s] = 'b%s;" % (self._name, lo, bin(ini[lo])))
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else:
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if isinstance(a, _Signal):
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if isinstance(a, _Signal) and a._name is not None:
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# Check that a._name is not None as None should not be
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# written into the converted code
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lines.append("assign %s[%s-1:%s] = %s;" % (self._name, hi, lo, a._name))
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else:
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lines.append("assign %s[%s-1:%s] = 'b%s;" %
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@ -103,6 +103,24 @@ def bench_ConcatSignalWithConsts():
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def test_ConcatSignalWithConsts():
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assert conversion.verify(bench_ConcatSignalWithConsts()) == 0
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@block
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def bench_ConcatSignalUndriven():
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n_sigs = 32
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sig_list = [Signal(False) for n in range(n_sigs)]
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concat_sig = ConcatSignal(*reversed(sig_list))
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@instance
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def check():
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yield delay(10)
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print(concat_sig)
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return check
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def test_ConcatSignalUndriven():
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assert conversion.verify(bench_ConcatSignalUndriven()) == 0
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@block
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def bench_TristateSignal():
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