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corrected path for vpi modules

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This commit is contained in:
jand 2008-03-13 16:23:54 +00:00
parent 345fbc636c
commit 0785d56957
1 changed files with 2 additions and 2 deletions
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4
myhdl/test/conversion/toVerilog/util.py
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@ -11,13 +11,13 @@ def setupCosimulationIcarus(**kwargs):
os.remove(objfile)
analyze_cmd = "iverilog -o %s %s.v tb_%s.v" % (objfile, name, name)
os.system(analyze_cmd)
simulate_cmd = "vvp -m ../../../cosimulation/icarus/myhdl.vpi %s" % objfile
simulate_cmd = "vvp -m ../../../../cosimulation/icarus/myhdl.vpi %s" % objfile
return Cosimulation(simulate_cmd, **kwargs)
# cver
def setupCosimulationCver(**kwargs):
name = kwargs['name']
cmd = "cver -q +loadvpi=../../../cosimulation/cver/myhdl_vpi:vpi_compat_bootstrap " + \
cmd = "cver -q +loadvpi=../../../../cosimulation/cver/myhdl_vpi:vpi_compat_bootstrap " + \
"%s.v tb_%s.v " % (name, name)
return Cosimulation(cmd, **kwargs)