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Merged in svenstaro/myhdl//fix-docs-this-is-actually-just-3-variabl-1397165148577 (pull request #9)

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Fix docs, this is actually just 3 variables
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jandecaluwe 2014-04-11 17:14:48 +02:00
commit 0e268cbf23
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doc/source/manual/rtl.rst
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@ -191,7 +191,7 @@ the :func:`StopSimulation()` exception to stop the simulation run. The test benc
a small incrementer and a small number of patterns is a follows::
def testbench():
count, enable, clock = [Signal(intbv(0)) for i in range(4)]
count, enable, clock = [Signal(intbv(0)) for i in range(3)]
reset = ResetSignal(0, active=ACTIVE_LOW, async=True)
inc_1 = Inc(count, enable, clock, reset, n=4)