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mirror of https://github.com/myhdl/myhdl.git synced 2024-12-14 07:44:38 +08:00

Added tests for put and get

This commit is contained in:
jand 2003-04-12 00:06:24 +00:00
parent 2a10440197
commit 21b5c3f764
2 changed files with 84 additions and 13 deletions

View File

@ -31,6 +31,7 @@ import exceptions
from Signal import Signal
import myhdl
import _simulator
from myhdl import intbv
_flag = 0
@ -75,8 +76,8 @@ class Cosimulation(object):
_flag = 1
_simulator._cosim = self
self.rt, self.wt = rt, wt = os.pipe()
self.rf, self.wf = rf, wf = os.pipe()
self._rt, self._wt = rt, wt = os.pipe()
self._rf, self._wf = rf, wf = os.pipe()
self._fromSignames = fromSignames = []
self._fromSizes = fromSizes = []
@ -139,20 +140,25 @@ class Cosimulation(object):
else:
raise Error, "Unexpected cosim input"
def get(self):
s = os.read(self.rt, MAXLINE)
def _get(self):
s = os.read(self._rt, _MAXLINE)
if not s:
raise SimulationEndError
e = s.split()
vals = e[1:]
for s, v in zip(self.toSigs, vals):
s.next = long(v, 16)
for s, v in zip(self._toSigs, vals):
try:
s.next = long(v, 16)
except ValueError:
s.next = intbv(None)
def put(self):
buf = hex(_simulator._time)
def _put(self):
buf = hex(_simulator._time)[2:]
buf += " "
for s in self.fromSigs:
buf += hex(s)
for s in self._fromSigs:
buf += hex(s)[2:]
buf += " "
os.write(wf, buf)
os.write(self._wf, buf)
def __del__(self):
""" Clear flag when this object destroyed - to suite unittest. """

View File

@ -50,14 +50,17 @@ exe = "python test_Cosimulation.py CosimulationTest"
fromSignames = ['a', 'bb', 'ccc']
fromSizes = [1, 11, 63]
fromVals = [0x2, 0x43, 0x24]
fromSigs = {}
for s in fromSignames:
fromSigs[s] = Signal(0)
for s, v in zip(fromSignames, fromVals):
fromSigs[s] = Signal(v)
toSignames = ['d', 'ee', 'fff', 'g']
toSizes = [32, 12, 3, 6]
toSigs = {}
for s in toSignames:
toSigs[s] = Signal(0)
toVals = [0x3, 0x45, 0x14, 0x12]
toXVals = ["X00", "FZ3", "34XZ", "56U"]
allSigs = fromSigs.copy()
allSigs.update(toSigs)
@ -195,6 +198,68 @@ class CosimulationTest(TestCase):
buf += "fff 6"
os.write(wt, buf)
def testFromSignalVals(self):
cosim = Cosimulation(exe + ".cosimFromSignalVals", **allSigs)
os.read(cosim._rt, MAXLINE)
cosim._put()
def cosimFromSignalVals(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
rf = int(os.environ['MYHDL_FROM_PIPE'])
buf = "FROM 00 "
for s, w in zip(fromSignames, fromSizes):
buf += "%s %s " % (s, w)
os.write(wt, buf)
os.read(rf, MAXLINE)
os.write(wt, "TO 0000 a 1")
os.read(rf, MAXLINE)
os.write(wt, "START")
os.read(rf, MAXLINE)
os.write(wt, "DUMMY")
s = os.read(rf, MAXLINE)
vals = [long(e, 16) for e in s.split()[1:]]
self.assertEqual(vals, fromVals)
def testToSignalVals(self):
cosim = Cosimulation(exe + ".cosimToSignalVals", **allSigs)
for n in toSignames:
self.assertEqual(toSigs[n].next, 0)
cosim._get()
for n, v in zip(toSignames, toVals):
self.assertEqual(toSigs[n].next, v)
os.write(cosim._wf, "DUMMY")
cosim._get()
for n in toSignames:
self.assertEqual(toSigs[n].next, None)
def cosimToSignalVals(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
rf = int(os.environ['MYHDL_FROM_PIPE'])
buf = "FROM 00 "
for s, w in zip(fromSignames, fromSizes):
buf += "%s %s " % (s, w)
os.write(wt, buf)
os.read(rf, MAXLINE)
buf = "TO 00 "
for s, w in zip(toSignames, toSizes):
buf += "%s %s " % (s, w)
os.write(wt, buf)
os.read(rf, MAXLINE)
os.write(wt, "START")
os.read(rf, MAXLINE)
buf = "0 "
for v in toVals:
buf += hex(v)[2:]
buf += " "
os.write(wt, buf)
os.read(rf, MAXLINE)
buf = "0 "
for v in toXVals:
buf += v
buf += " "
os.write(wt, buf)
if __name__ == "__main__":
unittest.main()