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support converting print functions

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This commit is contained in:
Keerthan Jaic 2015-03-17 18:48:43 -04:00
parent 2672e9a4c6
commit 302c78fc30
3 changed files with 26 additions and 5 deletions
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21
myhdl/conversion/_analyze.py
View File

@ -20,7 +20,7 @@
""" MyHDL conversion analysis module. """ MyHDL conversion analysis module.
""" """
from __future__ import absolute_import from __future__ import absolute_import, print_function
import inspect import inspect
# import compiler # import compiler
@ -46,7 +46,7 @@ from myhdl._Signal import _Signal, _WaiterList
from myhdl._ShadowSignal import _ShadowSignal, _SliceSignal, _TristateDriver from myhdl._ShadowSignal import _ShadowSignal, _SliceSignal, _TristateDriver
from myhdl._util import _isTupleOfInts, _dedent, _flatten, _makeAST from myhdl._util import _isTupleOfInts, _dedent, _flatten, _makeAST
from myhdl._resolverefs import _AttrRefTransformer from myhdl._resolverefs import _AttrRefTransformer
from myhdl._compat import builtins, integer_types from myhdl._compat import builtins, integer_types, PY2
myhdlObjects = myhdl.__dict__.values() myhdlObjects = myhdl.__dict__.values()
builtinObjects = builtins.__dict__.values() builtinObjects = builtins.__dict__.values()
@ -560,6 +560,13 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
def visit_Call(self, node): def visit_Call(self, node):
self.visit(node.func) self.visit(node.func)
f = self.getObj(node.func)
node.obj = None
if f is print:
self.visit_Print(node)
return
self.access = _access.UNKNOWN self.access = _access.UNKNOWN
for arg in node.args: for arg in node.args:
self.visit(arg) self.visit(arg)
@ -567,8 +574,6 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
self.visit(kw) self.visit(kw)
self.access = _access.INPUT self.access = _access.INPUT
argsAreInputs = True argsAreInputs = True
f = self.getObj(node.func)
node.obj = None
if type(f) is type and issubclass(f, intbv): if type(f) is type and issubclass(f, intbv):
node.obj = self.getVal(node) node.obj = self.getVal(node)
elif f is concat: elif f is concat:
@ -894,7 +899,13 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
f = [] f = []
nr = 0 nr = 0
a = [] a = []
for n in node.values:
if PY2 and isinstance(node, ast.Print):
node_args = node.values
else:
node_args = node.args
for n in node_args:
if isinstance(n, ast.BinOp) and isinstance(n.op, ast.Mod) and \ if isinstance(n, ast.BinOp) and isinstance(n.op, ast.Mod) and \
isinstance(n.left, ast.Str): isinstance(n.left, ast.Str):
if isinstance(n.right, ast.Tuple): if isinstance(n.right, ast.Tuple):

5
myhdl/conversion/_toVHDL.py
View File

@ -926,6 +926,11 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
fn = node.func fn = node.func
# assert isinstance(fn, astNode.Name) # assert isinstance(fn, astNode.Name)
f = self.getObj(fn) f = self.getObj(fn)
if f is print:
self.visit_Print(node)
return
fname = '' fname = ''
pre, suf = '', '' pre, suf = '', ''
opening, closing = '(', ')' opening, closing = '(', ')'

5
myhdl/conversion/_toVerilog.py
View File

@ -716,6 +716,11 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
fn = node.func fn = node.func
# assert isinstance(fn, astNode.Name) # assert isinstance(fn, astNode.Name)
f = self.getObj(fn) f = self.getObj(fn)
if f is print:
self.visit_Print(node)
return
opening, closing = '(', ')' opening, closing = '(', ')'
if f is bool: if f is bool:
self.write("(") self.write("(")