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VHDL conversion support.

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--HG--
branch : mep107
This commit is contained in:
Keerthan Jaic 2013-07-04 23:04:28 -04:00
parent 6e6989dd7c
commit 303fa28ed4
1 changed files with 2 additions and 1 deletions
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3
myhdl/conversion/_toVHDL.py
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@ -158,7 +158,8 @@ class _ToVHDLConvertor(object):
_annotateTypes(genlist)
### infer interface
intf = _analyzeTopFunc(func, *args, **kwargs)
top_inst = h.hierarchy[0]
intf = _analyzeTopFunc(top_inst, func, *args, **kwargs)
intf.name = name
# sanity checks on interface
for portname in intf.argnames: