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@ -604,11 +604,11 @@ alternative encoding schemes elegantly, using an additional parameter
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\var{encoding}. For example:
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\begin{verbatim}
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t_State = enum('SEARCH', 'CONFIRM', 'SYNC', encoding="one_hot")
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t_State = enum('SEARCH', 'CONFIRM', 'SYNC', encoding='one_hot')
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\end{verbatim}
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The default encoding is \code{``binary''}; the other possibilities are
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\code{``one_hot''} and \code{``one_cold''}. This parameter only
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The default encoding is \code{'binary'}; the other possibilities are
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\code{'one_hot'} and \code{'one_cold'}. This parameter only
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affects the conversion output, not the behavior of the type. Verilog
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case statements are optimized for an efficient implementation
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according to the encoding. Note that in contrast, a Verilog designer
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@ -222,7 +222,7 @@ defaults to zero. This function is especially useful in conjunction
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with the \class{intbv} class, that also works with downward indexing.
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\end{funcdesc}
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\begin{funcdesc}{enum}{arg \optional{, arg \moreargs} \optional{encoding=''binary''}}
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\begin{funcdesc}{enum}{arg \optional{, arg \moreargs} \optional{encoding='binary'}}
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Returns an enumeration type.
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The arguments should be string literals that represent the desired
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@ -233,9 +233,10 @@ t_EnumType = enum('ATTR_NAME_1', 'ATTR_NAME_2', ...)
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\end{verbatim}
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The enumeration type identifiers are available as attributes of
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the type name, for example: \code{t_EnumType.ATTR_NAME_1}
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The optional keyword argument \var{encoding} specifies the encoding
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scheme used in Verilog output. The available encodings are \code{``binary''},
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\code{``one_hot''}, and \code{``one_cold''}.
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scheme used in Verilog output. The available encodings are \code{'binary'},
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\code{'one_hot'}, and \code{'one_cold'}.
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\end{funcdesc}
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\begin{funcdesc}{instances}{}
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