partial

example/manual/inc.py

@@ -1,13 +1,10 @@
-from __future__ import generators
-
 from random import randrange
-
+from myhdl import *
-from myhdl import Signal, Simulation, StopSimulation
-from myhdl import intbv, delay, posedge, negedge, now, always, instance
 
 ACTIVE_LOW, INACTIVE_HIGH = 0, 1
 
 def Inc(count, enable, clock, reset, n):
+    
     """ Incrementer with enable.
     
     count -- output
@@ -15,20 +12,24 @@ def Inc(count, enable, clock, reset, n):
     clock -- clock input
     reset -- asynchronous reset input
     n -- counter max value
+    
     """
-    while 1:
+    
-        yield clock.posedge, reset.negedge
+    @always(clock.posedge, reset.negedge)
+    def incLogic():
         if reset == ACTIVE_LOW:
             count.next = 0
         else:
             if enable:
                 count.next = (count + 1) % n
 
+    return incLogic
+
 
 def testbench():
     count, enable, clock, reset = [Signal(intbv(0)) for i in range(4)]
 
-    INC_1 = Inc(count, enable, clock, reset, n=4)
+    inc_1 = Inc(count, enable, clock, reset, n=4)
 
     HALF_PERIOD = delay(10)
 
@@ -55,7 +56,7 @@ def testbench():
             yield delay(1)
             print "   %s      %s" % (enable, count)
 
-    return clockGen, stimulus, INC_1, monitor
+    return clockGen, stimulus, inc_1, monitor
 
 tb = testbench()
 

example/manual/mux2.py

@@ -1,6 +1,7 @@
 from myhdl import Signal, Simulation, delay, always_comb
 
 def Mux(z, a, b, sel):
+    
     """ Multiplexer.
     
     z -- mux output
@@ -8,14 +9,15 @@ def Mux(z, a, b, sel):
     sel -- control input: select a if asserted, otherwise b
     
     """
+    
     @always_comb
-    def muxlogic():
+    def muxLogic():
         if sel == 1:
             z.next = a
         else:
             z.next = b
 
-    return muxlogic
+    return muxLogic
 
 from random import randrange