From 464b7c1a6709b81bfb99f5bf2cdc0bd03405f781 Mon Sep 17 00:00:00 2001
From: jand <none@none>
Date: Tue, 17 Jun 2003 20:27:24 +0000
Subject: [PATCH] make it work with 2.3 Added some long casts put yield for
 comb logic at the end of function for consistency

---
 myhdl/test_Signal.py     | 12 ++++++------
 myhdl/test_Simulation.py |  5 ++++-
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/myhdl/test_Signal.py b/myhdl/test_Signal.py
index 4a402594..320016ac 100644
--- a/myhdl/test_Signal.py
+++ b/myhdl/test_Signal.py
@@ -276,11 +276,11 @@ class TestSignalAsNum(TestCase):
     def binaryCheck(self, op, imin=0, imax=None, jmin=0, jmax=None):
         self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
         for i, j in zip(self.seqi, self.seqj):
-            bi = Signal(i)
-            bj = Signal(j)
-            ref = op(i, j)
+            bi = Signal(long(i))
+            bj = Signal(long(j))
+            ref = op(long(i), j)
             r1 = op(bi, j)
-            r2 = op(i, bj)
+            r2 = op(long(i), bj)
             r3 = op(bi, bj)
             self.assertEqual(type(r1), type(ref))
             self.assertEqual(type(r2), type(ref))
@@ -293,7 +293,7 @@ class TestSignalAsNum(TestCase):
         self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
         for i, j in zip(self.seqi, self.seqj):
             bj = Signal(j)
-            ref = i
+            ref = long(i)
             exec("ref %s j" % op)
             r1 = bi1 = Signal(i)
             try:
@@ -302,7 +302,7 @@ class TestSignalAsNum(TestCase):
                 pass
             else:
                 self.fail()
-            r2 = i 
+            r2 = long(i)
             exec("r2 %s bj" % op)
             r3 = bi3 = Signal(i)
             try:
diff --git a/myhdl/test_Simulation.py b/myhdl/test_Simulation.py
index 94bc48e2..d4b8710f 100644
--- a/myhdl/test_Simulation.py
+++ b/myhdl/test_Simulation.py
@@ -418,6 +418,8 @@ class DeltaCycleOrder(TestCase):
         random.shuffle(vectors)
         index = range(4)
 
+        f = open("tmp1", "w")
+
         def clkGen():
             while 1:
                 yield delay(10)
@@ -439,8 +441,9 @@ class DeltaCycleOrder(TestCase):
 
         def logic():
             while 1:
-                yield a, b, c, d
+                # yield a, b, c, d
                 z.next = function(a.val, b.val, c.val, d.val)
+                yield a, b, c, d
 
         def stimulus():
             for v in vectors: