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Solved bug 3529686

This commit is contained in:
Jan Decaluwe 2012-05-25 11:09:22 +02:00
parent 626fa15d62
commit 5aad5f3254
2 changed files with 26 additions and 1 deletions

View File

@ -759,7 +759,7 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
if not hasattr(test, 'case'):
return
var, item = test.case
if var.obj != var1.obj or type(item) is not type(item1):
if var.id != var1.id or type(item) is not type(item1):
return
if item in choices:
return

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@ -0,0 +1,25 @@
from myhdl import *
def bug_3529686(clr, clk, run, ack, serialout):
@always(clk.posedge, clr.posedge)
def fsm():
if (clr == 0):
serialout.next = 0
else:
if (ack == 0):
serialout.next = 0
elif (run == 1):
serialout.next = 1
return fsm
clr, clk, run, ack, serialout = [Signal(bool()) for i in range(5)]
def test_bug_3529686():
try:
toVHDL(bug_3529686, clr, clk, run, ack, serialout)
except:
assert False