initialize clock in test

2024-12-14 07:44:38 +08:00 · 2015-03-18 10:17:11 -05:00 · 2015-03-18 10:17:11 -05:00 · 6428addb73
commit 6428addb73
parent f921260dd0
1 changed files with 1 additions and 0 deletions
--- a/myhdl/test/conversion/general/test_interfaces3.py
+++ b/myhdl/test/conversion/general/test_interfaces3.py
@ -140,6 +140,7 @@ def c_testbench_three():
    
    @instance
    def tbclk():
+        clock.next = False
        while True:
            yield delay(3)
            clock.next = not clock