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Support for toVHDL.library
--HG-- branch : 0.8-dev
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parent
5352e7971d
commit
64b125a8cf
@ -92,7 +92,8 @@ class _ToVHDLConvertor(object):
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__slots__ = ("name",
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"component_declarations",
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"header",
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"no_myhdl_header"
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"no_myhdl_header",
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"library"
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)
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def __init__(self):
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@ -100,6 +101,7 @@ class _ToVHDLConvertor(object):
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self.component_declarations = None
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self.header = ''
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self.no_myhdl_header = False
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self.library = "work"
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def __call__(self, func, *args, **kwargs):
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global _converting
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@ -148,6 +150,7 @@ class _ToVHDLConvertor(object):
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doc = _makeDoc(inspect.getdoc(func))
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needPck = len(_enumTypeSet) > 0
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lib = self.library
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if pfile:
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_writeFileHeader(pfile, ppath)
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@ -157,7 +160,7 @@ class _ToVHDLConvertor(object):
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_writeFileHeader(vfile, vpath)
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if needPck:
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_writeCustomPackage(vfile, intf)
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_writeModuleHeader(vfile, intf, needPck, doc)
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_writeModuleHeader(vfile, intf, needPck, lib, doc)
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_writeFuncDecls(vfile)
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_writeSigDecls(vfile, intf, siglist, memlist)
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_writeCompDecls(vfile, compDecls)
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@ -219,16 +222,18 @@ def _writeCustomPackage(f, intf):
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print >> f
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def _writeModuleHeader(f, intf, needPck, doc):
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def _writeModuleHeader(f, intf, needPck, lib, doc):
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print >> f, "library IEEE;"
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print >> f, "use IEEE.std_logic_1164.all;"
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print >> f, "use IEEE.numeric_std.all;"
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print >> f, "use std.textio.all;"
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print >> f
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print >> f, "use work.pck_myhdl_%s.all;" % _version
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if lib != "work":
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print >> f, "library %s;" % lib
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print >> f, "use %s.pck_myhdl_%s.all;" % (lib, _version)
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print >> f
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if needPck:
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print >> f, "use work.pck_%s.all;" % intf.name
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print >> f, "use %s.pck_%s.all;" % (lib, intf.name)
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print >> f
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print >> f, "entity %s is" % intf.name
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if intf.argnames:
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