From 68ac94cc544d187de93df1b550496dbd35d23ae7 Mon Sep 17 00:00:00 2001 From: Jan Decaluwe Date: Fri, 18 Sep 2015 20:46:48 +0200 Subject: [PATCH] Fix #114 --- myhdl/conversion/_toVHDL.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/myhdl/conversion/_toVHDL.py b/myhdl/conversion/_toVHDL.py index 7ee27ddd..ec1d5437 100644 --- a/myhdl/conversion/_toVHDL.py +++ b/myhdl/conversion/_toVHDL.py @@ -777,6 +777,14 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin): self.write(")") def visit_UnaryOp(self, node): + # in python3 a negative Num is represented as an USub of a positive Num + # Fix: restore python2 behavior by a shortcut: invert value of Num, inherit + # vhdl type from UnaryOp node, and visit the modified operand + if isinstance(node.op, ast.USub) and isinstance(node.operand, ast.Num): + node.operand.n = -node.operand.n + node.operand.vhd = node.vhd + self.visit(node.operand) + return pre, suf = self.inferCast(node.vhd, node.vhdOri) self.write(pre) self.write("(")